Zu7 Xilinx

[Erwin Beatz]

Witha combined team of 13,000 talented engineers and over $2.7 billion of annual1 R&D investment, AMD will have additional talent and scale to deliver an even stronger set of products and domain-specific solutions.

Additional Transaction Details

Under the terms of the agreement, Xilinx stockholders will receive a fixed exchange ratio of 1.7234 shares of AMD common stock for each share of Xilinx common stock they hold at the closing of the transaction. Based on the exchange ratio, this represents approximately $143 per share of Xilinx common stock2. Post-closing, current AMD stockholders will own approximately 74 percent of the combined company on a fully diluted basis, while Xilinx stockholders will own approximately 26 percent. The transaction is intended to qualify as a tax-free reorganization for U.S. federal income tax purposes.

AMD expects to achieve operational efficiencies of approximately $300 million within 18 months of closing the transaction, primarily based on synergies in costs of goods sold, shared infrastructure and through streamlining common areas.

The transaction has been unanimously approved by the AMD and Xilinx Boards of Directors. The acquisition is subject to approval by AMD and Xilinx shareholders, certain regulatory approvals and other customary closing conditions. The transaction is currently expected to close by the end of calendar year 2021. Until close, the parties remain separate, independent companies.

Management and Board of Directors

Dr. Lisa Su will lead the combined company as CEO. Xilinx President and CEO, Victor Peng, will join AMD as president responsible for the Xilinx business and strategic growth initiatives, effective upon closing of the transaction. In addition, at least two Xilinx directors will join the AMD Board of Directors upon closing.

Advisors

Credit Suisse and DBO Partners are acting as financial advisors to AMD and Latham & Watkins LLP is serving as its legal advisor. Morgan Stanley is acting as lead financial advisor to Xilinx. BofA Securities is also acting as a financial advisor and Skadden, Arps, Slate, Meagher & Flom LLP is serving as legal counsel.

Conference Call and Webcast Details

AMD will hold a conference call for the financial community at 8:00 AM ET (5:00 AM PT) today to discuss its third quarter 2020 financial results and plans to acquire Xilinx. AMD will provide a real-time audio broadcast of the teleconference on the Investor Relations page of its website at www.amd.com. The webcast will be available for 12 months after the conference call.

About Xilinx

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the cloud to the edge and to the endpoint. Xilinx is the inventor of the FPGA and Adaptive SoCs, designed to deliver the most dynamic processor technology in the industry. We partner with our customers to create scalable, differentiated and intelligent solutions to enable the adaptable, intelligent and connected world of the future. For more information, visit www.xilinx.com.

This communication is not intended to and shall not constitute an offer to buy or sell or the solicitation of an offer to buy or sell any securities, or a solicitation of any vote or approval, nor shall there be any sale of securities in any jurisdiction in which such offer, solicitation or sale would be unlawful prior to registration or qualification under the securities laws of any such jurisdiction. No offer of securities shall be made, except by means of a prospectus meeting the requirements of Section 10 of the Securities Act of 1933, as amended.

VHDL libraries are added via the tool(i.e. the VHDL says the name of the library but the Quartus .qsf or ISE file specifies what file to read in that has the library.) One idea might be to make an empty UNISIM library and add that to the Quartus project. Since nothing is neeeded out of it, it should work out all right. (I haven't tried it, but think it would work.)

I would suggest using the MegaWizard, and using the recommended flow of just instantiating the created file(I've seen people use the Megawizard to create something like a PLL, then rip the primitive instantiation out of the megafunction and put it into their file. This is ugly because it creates something that can't be re-edited/analyzed/updated with the megawizard, and usually has a bunch of parameters the user starts mucking with yet doesn't understand them).

I believe you can run the megawizard as an executable(i.e. batch file) to create many variations, but I don't know much about it, and would be surprised at how straightforward it is. In general, when building a design, I'm fine with this method since you're really only creating a PLL at a time, it has a specific function, and it's nice to have access to all the menus to decide what you do and do not need. But when doing a bulk conversion, it can be cumbersome(especially when converting from an X design, where only one DCM primitive was used and you passed in parameters, so what you're doing makes sense.)

If this is in vhdl or verilog, I wouldn't try to wrap the altera libraries with xilinx stuff. Just put it under a revision control system like git or hg, check in your initial xilinx commit, and then rip the stuff out if you don't plan on going back to xilinx any time soon. The start in earnest on your new Altera stuff. Take this as a good opportunity to separate your xilinx/altera proprietary stuff in to nice libraries that you can easily include or uninclude in the future rather than mixing and matching your generic code with proprietary code.

I made dummy libraries from Xilinx and Altera stuff (unisim, altera_mf) containing the components declaration. If we can now compile our design on both plattform, during synthesis if just load the dummy xlinx lib in quartus, and it won't complain that it can't find unisim lib.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

I'm beginning to learn embedded with C (and maybe some C++) and someone from the office said they're willing to donate a free xilinx chip they've got sitting on their shelf. I was thinking more along the lines of an Arduino, especially that the Arduino tutorials and sample projects are abundant.

I'm interested in hearing whatever comes to your mind when you hear xilinx as opposed to Arduino. I know very little about chips, let alone this particular one, so it's very hard to have any informed comparison.

Xilinx chips are very commonly used, but not for what you want. Xilinx makes FPGAs and CPLDs, which are programmed with VHDL and Verilog (not respectively, both are programmed with both). They are used for prototyping logic circuits to be turned into integrated circuits. If you wanted to make your own ARM chip, for example, you could buy some code from ARM and put it on an FPGA from Xilinx and then program the result in C. I'm not recommending that, just trying to give you an idea of what these beasts are for. Anyway, Arduino is a solid platform for what you want. Go with that.

Xilinx is in the business of selling FPGA chips. Such a chip is going to worthless to you without the tooling you need to create the logic design and burn the chip. The tooling used to be quite expensive but is available for free for low-to-medium end chips (as pointed out in the comments). Google "Verilog" and "FPGA programming".

Xilinx make FPGAs and other programmable logic devices. It is possible to have an FPGA with a hard or soft core processor embedded (i.e. a processor defined in FPGA logic gates), and for that core to be programmed in C, but if you are starting out, how many balls do you want to juggle at once? Such a core will be useless without the ability also to synthesize the peripheral hardware necessary to make it do something useful. They are used in highly specialised applications where the core and peripheral set need to be tightly coupled to the application. They are often used in applications where standards are still under development (such as wireless communications), where both firmware and software may need to change in-field to support changes. Another use of FPGAs is in directly implementing algorithms in hardware to take advantage of the parallelism and pipe-lining that they make possible offering massive acceleration compared to software solutions..

While Arduino, or more specifically AVR (there are other AVR development platforms available) can be programmed in C and C++, if you are serious about using C++ in embedded systems, a 32-bit platform may be more appropriate (as well as having performance advantages). A development board based on an ARM Cortex-M3 or ARM 7 would be a good start, especially since ARM is also a common choice for soft-core processors on FPGAs if you eventually progress to that.

Xilinx makes FPGAs and associated software tools. FPGAs are - abstractly - loads of NAND gates configured with look-up-tables. They are often used in place of custom silicon chips for extra-fast logic when the number of units is not enough to justify creating an ASIC.

Mind you, you can load a 'soft-core' description of a regular CPU and program with C the CPU that the FPGA has loaded.... you don't want to do that when learning embedded. You may wind up needing to debug your CPU. Which, well, can be fun. If you want to do that.

As many here have already said Xilinx are FPGAs. FPGAs are "softlogic" in that you use a simalar development process to developing an ASIC, but you can test your design on hardware without requiring a fabrication plant to do so. The trade off is speed, they implement "meta-logic" instead layout a design composed of traditional "nand-nand" or "nor-nor" logic, they have programmable look up tables which can be programmed to implement arbitrary logic gates. This is simalar in concept to running an interpretor for a processor instead of native code.

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