[Altera Quartus 12.1 Crack
Saija Grzegorek
I am having a bit of trouble programming my Terasic DE0-CV board (Cylone V) with Quartus Prime Lite Edition 18.1. I am on Windows 7. I have the board plugged into a USB port and the Altera USB-Blaster appears in the Device Manager under Universal Serial Bus Controllers. I went through the process of installing the proper driver for the USB-Blaster from the quartus\drivers folder the first time I plugged the board in. That part seems to be ok. The USB-Blaster appears to be happy. The problem begins when I attempt to program the board. The Quartus programmer cannot find the USB-Blaster under the Available Hardware tab. When I click Add Hardware I get an error message:
This seems pretty clear. I can't use the programmer because the JTAG server is not installed. But how should I go about installing? My research seems to indicate that I should have a jtagserver.exe in my \bin64 folder but none is present. Am I mistaken about this?
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But when I start Quartus Programmer to download my logic to the board, the hardware part of the interface is blank where I expect to see my card: What can be done? The instructions I have are available here.
I reinstalled the drivers, reinstalled Quartus II different versions many times, reset the board, tried both the Quartus version from the CD and from the internet, I see many other people have the same problem with the same board, thank you Altera for making us lose valuable time wasting our time on faulty software. Why can't it work? From the command-line I can run a tool named jtagconfig that actually seems to find the board but this is from the command line:
I reinstalled and ran the program this time with admin privileges and antivirus turned off and then it worked. The DE2 board appears in my Quartus Programmer and I can download the logic to the board.
You have to install the driver manually for the board. Don't let windows install it for you. The driver you need is in Altera's Driver folder. The path on my machine is C:/altera/11.1sp2/quartus/drivers/
Although the thread is rather old, but this problem exists with some of Altera's product. I still have a DE0 board which uses Cyclone III and no matter how old it is, it works perfectly. However, Quartus has stopped supporting Cyclone III from v14.0 and we want to use windows 10.
Important thing to note is I found out that the driver files came with v12.0 (which I tried to use at that time) are not working with Windows 10. The indication is that they are not signed files and windows should warn about that. But it doesn't show any warning even if you enter TEST mode of Windows 10.
The system includes a powerful built-in synthesis engine, which is used by default. It also supports use of the Altera Quartus II synthesizer within the design environment. To enable an FPGA project to utilize this synthesis tool the project synthesis option must be set to Altera Quartus II. This is done by selecting Project Project Options from the menus, clicking on the Synthesis tab and choosing Altera Quartus II from the dropdown Synthesizer list. Once this is selected, you must indicate the folder where the quartus_map binary executable file resides, using the dropdown's associated browse button (...). The Options region of the Synthesis tab will become populated with Altera Quatus II-related options. Configure these to best suit your design.
For advanced users, options that are not present on the Synthesis tab can be accessed from the DefaultScript_Quartus.Txt script file located in the \System folder of the installation. Analysis and synthesis switches must be configured in accordance with the Altera Introduction to Quartus II Manual.
Since it may take some time for us to modify the script environment for Quartus, it would be great if you could run a quick test, provided that you have access to Quartus 17.0. The GPL release, available from our website, includes a few designs targeting Intel/Altera. For instance, you can pick the one below:
The README file of that design explicitly mentions that Quartus 16.0 is supported, so chances are the newer version 17.0 still works. It should be enough to go to that design, ensuring that Quartus is in your PATH environment variable and running
When I used newer versions of Quartus, I got the message of quartus_map not being supported, and therefore none of the above is printed. That should be a good first step to know if v17.0 is still supported.
I believe I can perform that testing this week. I was able to configure a Linux VM with the Quartus 17.0 tools, and copied over the GRLIB GPL release (latest). Based on your instructions above, it should be straightforward.
That is excellent news, much thanks to your team. I planned to try that out in the next day or two, and will still do so, as I am targeting Cyclone IV and V technology. I definitely believe this is a valuable update to the documentation, and again I still plan to test similar versions and post my results.
The problem was that we had Quartus 20.1 Pro and 20.4 Pro installed in our servers, so the design was failing. Therefore, the conclusion is that any version of Quartus Standard Edition at least up to 20.1 (we have not tested any further) is supported.
The problem was that Pro does not support Cyclone V, but I was getting misleading messages about the command quartus_map not being supported anymore. In the following link you can see which families are supported by which tool:
Glad you fixed it. I have quickly checked the documentation and am a bit puzzled about why the instructions on grlib.pdf do not mention the PATH variable - this step is usually a must. Currently It is only included in the section covering Windows / Cygwin installation.
The README file of that design explicitly mentions that Quartus 16.0 is supported, so chances are the newer version 17.0 still works. It should be enough to go to that design, ensuring that Quartus is in your PATH environment variable and running
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Qsys delivers the highest flexibility by automatically handling the bridging between multiple interface standards. Designers leveraging Qsys can develop systems using Avalon-based, Qsys-compliant IP cores, and can add IP cores that use a different industry standard interface in the future without replacing the original IP cores. Qsys supports the open-standard Avalon interface with this release. Future releases of Qsys will support additional industry-standard interfaces, such as AMBA AXI from ARM.
Quartus II software version 11.0 provides faster board bring up through enhancements to the software's external memory interface toolkit and transceiver toolkit. New performance and monitoring capabilities in the external memory interface toolkit improves productivity by helping achieve maximum memory efficiency. The enhanced transceiver toolkit delivers an improved channel manager interface and an updated transceiver control panel, so designers can optimize their transceivers for improved signal integrity and bring their boards up faster.
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I've successfully used an LPM counter in my code but I can't help
feeling that I just got lucky. Something seems missing. I used the
"Megawizard thingy". I cut and pasted the component declaration from one of the files it
created and I cut and pasted the component instantiation from one of
the files it created (editing it for my code of course). Then I added
the vhdl file it created to my project in the project window. That's
it.I feel like I'm getting away with this but it's not rigorous.
Shouldn't I need a library use clause or something? I'd like to say
again that everything is working fine but it just seems like something
is being assumed and when I try to move this code elsewhere its going
to break.Shannon