gollvm: capture-fcn-attributes.go generates the header file with improperly chosen CPU model (i686; yonah)

[Ivan Serdyuk]

Hello.

This issue is related to https://go-review.googlesource.com/c/gollvm/+/274574
.

I think I have some misunderstanding on how you used to deal with CPU models, for LLVM.

First things first - I had success with using

#include "llvm/ADT/StringRef.h"
#include "llvm/ADT/StringMap.h"
#include "llvm/MC/SubtargetFeature.h"
#include "llvm/Support/Host.h"

using namespace llvm;
SubtargetFeatures Features1;

int main (int argc, char **argv)
{
sys::getHostCPUName();
StringMap HostFeatures;
if (sys::getHostCPUFeatures(HostFeatures))
for (auto &F : HostFeatures)
Features1.AddFeature(F.first(), F.second);

printf("test %s", Features1.getString().c_str());
printf("\nsomething else\n");
return 0;
}
. It gives me such a set of CPU features:

+sse2,-tsxldtrk,-cx16,-sahf,-tbm,-avx512ifma,-sha,-gfni,-fma4,-vpclmulqdq,-prfchw,-bmi2,-cldemote,-fsgsbase,-ptwrite,-amx-tile,-avx512bf16,-popcnt,-aes,-avx512bitalg,-movdiri,-xsaves,-avx512er,-xsavec,-avx512vnni,-amx-bf16,-avx512vpopcntdq,-pconfig,-clwb,-avx512f,-clzero,-pku,+mmx,-lwp,-rdpid,-xop,-rdseed,-waitpkg,-movdir64b,-sse4a,-avx512bw,-clflushopt,-xsave,-avx512vbmi2,-64bit,-avx512vl,-serialize,-invpcid,-avx512cd,-avx,-vaes,+cx8,-fma,-rtm,-bmi,-enqcmd,-rdrnd,-mwaitx,-sse4.1,-sse4.2,-avx2,+fxsr,-wbnoinvd,+sse,-lzcnt,-pclmul,-prefetchwt1,-f16c,-ssse3,-sgx,-shstk,+cmov,-avx512vbmi,-amx-int8,-movbe,-avx512vp2intersect,-xsaveopt,-avx512dq,-adx,-avx512pf,+sse3

$ llc --version
provides
Default target: i686-pc-linux-gnu
Host CPU: yonah
.

I tried to update the capture-fcn-attributes.go file, like this:

var supportedTriples []string = []string{
"x86_64-unknown-linux-gnu",
"i686-pc-linux-gnu",
"aarch64-unknown-linux-gnu",
}
.

When I tried the generator

capture-fcn-attributes -o /tmp/cpu_feature_list
it generated me a broad list.
The header contained

Ubuntu clang version 11.0.0-++20200721055954+cebd637c886-1exp120200721161335.13
.
I found

// triple: i686-pc-linux-gnu
static const CpuAttrs attrs1[] = {
// first entry is default cpu
{ "i686", "+cx8,+x87"},

and (inside the hashmap)

{ "yonah", "+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
, which is not what I have supported (for Intel Celeron M440).
Clang reports "unsupported CPU features" on any non-provided one.
So that is one big problem.
Next problem is that

const TripleCpus triples[] = {
{ "x86_64-unknown-linux-gnu", &attrs0[0] },
{ "i686-pc-linux-gnu", &attrs1[0] },
{ "aarch64-unknown-linux-gnu", &attrs2[0] },
{ "", nullptr } // sentinel
};
is not targeting to yonah, while llc is targeting it.
It is always some "default" CPU model and, in fact, your code never provided extraction of the CPU model (from llc).

To make my observation complete - I am providing what is generated via

capture-fcn-attributes -cpu yonah
:

// triple: x86_64-unknown-linux-gnu
static const CpuAttrs attrs0[] = {
// first entry is default cpu
{ "x86-64", "+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
{ "", "" } // sentinel
};

// triple: i686-pc-linux-gnu
static const CpuAttrs attrs1[] = {
// first entry is default cpu
{ "i686", "+cx8,+x87"},
{ "yonah", "+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
{ "", "" } // sentinel
};

// triple: aarch64-unknown-linux-gnu
static const CpuAttrs attrs2[] = {
// first entry is default cpu
{ "generic", "+neon"},
{ "", "" } // sentinel
};

const TripleCpus triples[] = {
{ "x86_64-unknown-linux-gnu", &attrs0[0] },
{ "i686-pc-linux-gnu", &attrs1[0] },
{ "aarch64-unknown-linux-gnu", &attrs2[0] },
{ "", nullptr } // sentinel
};
.

I tried

capture-fcn-attributes -cpu yonah -triples i686-pc-linux-gnu
and got

// triple: i686-pc-linux-gnu
static const CpuAttrs attrs0[] = {
// first entry is default cpu
{ "i686", "+cx8,+x87"},
{ "yonah", "+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
{ "", "" } // sentinel
};

const TripleCpus triples[] = {
{ "i686-pc-linux-gnu", &attrs0[0] },
{ "", nullptr } // sentinel
};
.

I understand that your strategy worked find on Intel based system-on-board machines - but didn't try something for AMD (yet).
Nevertheless I have these issues on i686 - so I am proposing to perform a review.

Ivan

[Than McIntosh]

Hello,

Thanks for the note.

I am still not completely sure what the problem is.

You wrote:

 | I found
 |
 | // triple: i686-pc-linux-gnu
 | static const CpuAttrs attrs1[] = {
 | // first entry is default cpu
 | { "i686", "+cx8,+x87"},
 |
 | and (inside the hashmap)
 |
 | { "yonah", "+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
 | , which is not what I have supported (for Intel Celeron M440).

What makes you say that this is not what you have supported? Are you
saying that the cpu clang calls "yonah" doesn't actually have one of these
features (ex: sse3)?

 | Clang reports "unsupported CPU features" on any non-provided one.
 | So that is one big problem.

Not sure what you mean here. Can you please post the complete clang invocation and error message you are getting?

 | const TripleCpus triples[] = {
 | { "x86_64-unknown-linux-gnu", &attrs0[0] },
 | { "i686-pc-linux-gnu", &attrs1[0] },
 | { "aarch64-unknown-linux-gnu", &attrs2[0] },
 | { "", nullptr } // sentinel
 | };
 | is not targeting to yonah, while llc is targeting it.
 | It is always some "default" CPU model and, in fact, your code never provided extraction of the CPU model (from llc).
 |

When llc emits the line

  Host CPU: yonah

this does not mean that clang/llc will automatically target 'yonah' when compiling, it just means that the program has detected the host CPU.

Generally speaking if you want clang to produce code targeted specifically to the host CPU, you have to use -march=native or -mtune-native.

Thanks, Than

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[Ivan Serdyuk]

Happy New Year, Than.

So I have rebuilt llvm-goc, after applying https://go-review.googlesource.com/c/gollvm/+/270219.

Here is my compressed build folder.

I am using

$ clang --version
clang version 12.0.0
Target: i686-pc-linux-gnu
Thread model: posix

on

$ uname -a
Linux oceanfish81-A8He 4.15.0-129-generic #132-Ubuntu SMP Thu Dec 10 14:07:35 UTC 2020 i686 i686 i686 GNU/Linux

You can obtain a pre-compiler "MinSizeRel" build of LLVM (including Clang) here.

I tried to build an avarage libgo package - and here is what I got:

$ ninja libgo_golang.org_x_crypto_chacha20
[1/120] Building Go package 'unicode' (non-PIC)
FAILED: tools/gollvm/libgo/unicode.o
cd /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo && /usr/local/bin/cmake -E make_directory ./. && /home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc -c -o /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo/./unicode.o -fgo-pkgpath=unicode -I . /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/casetables.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/digit.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/graphic.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/letter.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/tables.go
currently Gollvm is not supported on architecture i686
/home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc: unable to determine target CPU features for target i686-pc-linux-gnu
[2/120] Building Go package 'internal/unsafeheader' (PIC)
FAILED: tools/gollvm/libgo/internal/.pic/unsafeheader.o
cd /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo && /usr/local/bin/cmake -E make_directory ./internal/.pic && /home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc -c -o /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo/internal/.pic/unsafeheader.o -fPIC -fgo-pkgpath=internal/unsafeheader -I . /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/internal/unsafeheader/unsafeheader.go
currently Gollvm is not supported on architecture i686
/home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc: unable to determine target CPU features for target i686-pc-linux-gnu
ninja: build stopped: subcommand failed.

Ivan

[Ivan Serdyuk]

Ping

[Than McIntosh]

It would be helpful if you could put up a CL that includes all of the changes you're testing -- at this point do you have any modifications to driver/ArchCpusAttrs.h ?

Thanks

To view this discussion on the web visit https://groups.google.com/d/msgid/golang-nuts/cc763125-04fe-4a8d-9940-625c0f25cc50n%40googlegroups.com.

[Ivan Serdyuk]

Than,

I could perform "git diff" and provide the generated file.

I could also compress & share the build folder.

What else would be required?

Ivan

[Than McIntosh]

Diff is fine. No need for the entire folder.

Than

To view this discussion on the web visit https://groups.google.com/d/msgid/golang-nuts/67c15826-5ed2-40ca-b284-6ff471fb6584n%40googlegroups.com.

[Ivan Serdyuk]

Here you go:

~/Desktop/workarea/llvm-project/llvm/tools/gollvm$ git diff

diff --git a/cmake/modules/AutoGenGo.cmake b/cmake/modules/AutoGenGo.cmake
index 3e3ab83..097a2ad 100644
--- a/cmake/modules/AutoGenGo.cmake
+++ b/cmake/modules/AutoGenGo.cmake
@@ -51,6 +51,17 @@ function(mkversion goos goarch outfile bindir srcroot scriptroot)
     set(pcquantum "1")
     set(int64align "8")
     set(minframesize 0)
+  elseif( ${goarch} STREQUAL "386")
+    # Simply picking up one typical setting
+    # Align with current sets in gofrontend/libgo/goarch.sh
+    set(archfamily "I386")
+    set(bigendian "false")
+    set(cachelinesize "64")
+    set(physpagesize "4096")
+    set(pcquantum "1")
+    set(int64align "4")
+    set(minframesize 4)
+    set(ptrsize 4)
   elseif( ${goarch} STREQUAL "arm64")
     # Simply picking up one typical setting
     # Align with current sets in gofrontend/libgo/goarch.sh
diff --git a/cmake/modules/GoVars.cmake b/cmake/modules/GoVars.cmake
index ec6f6b2..0cea38a 100644
--- a/cmake/modules/GoVars.cmake
+++ b/cmake/modules/GoVars.cmake
@@ -8,6 +8,9 @@ list(GET lht_components 2 goos)
 # LLVM's "x86_64" is the same as Go's "amd64".
 if( ${llarch} STREQUAL "x86_64" )
   set(goarch "amd64")
+# For i386/i686
+elseif( ${llarch} STREQUAL "i686" )
+  set(goarch "386")
 # LLVM's "aarch64" is the same as Go's "arm64".
 elseif( ${llarch} STREQUAL "aarch64" )
   set(goarch "arm64")
@@ -23,6 +26,10 @@ set(allgoos "aix" "android" "darwin" "dragonfly" "freebsd" "irix" "linux" "netbs
 # Set library suffix based on target triple
 if( ${llarch} STREQUAL "x86_64" )
   set(library_suffix "64")
+elseif( ${llarch} STREQUAL "i686" )
+# Driver::installedLibDir honors ./lib only, on Ubuntu 16
+# But we can stick for ./lib32 (along with those in AddGollvm.cmake)
+  set(library_suffix "32")
 elseif( ${llarch} STREQUAL "aarch64" )
 # Driver::installedLibDir honors ./lib64 only
 # Future change needed (along with those in AddGollvm.cmake)
diff --git a/cmake/modules/LibbacktraceUtils.cmake b/cmake/modules/LibbacktraceUtils.cmake
index dc54f18..42287a9 100644
--- a/cmake/modules/LibbacktraceUtils.cmake
+++ b/cmake/modules/LibbacktraceUtils.cmake
@@ -8,6 +8,9 @@ function(setup_libbacktrace)
   if( ${goarch} STREQUAL "amd64")
     set(BACKTRACE_ELF_SIZE 64)
     set(HAVE_GETIPINFO 1)
+  elseif( ${goarch} STREQUAL "386")
+    set(BACKTRACE_ELF_SIZE 32)
+    set(HAVE_GETIPINFO 1)
   elseif( ${goarch} STREQUAL "arm64")
     set(BACKTRACE_ELF_SIZE 64)
     set(HAVE_GETIPINFO 1)
diff --git a/cmake/modules/LibffiUtils.cmake b/cmake/modules/LibffiUtils.cmake
index b3fa697..fb34c36 100644
--- a/cmake/modules/LibffiUtils.cmake
--- a/cmake/modules/LibffiUtils.cmake
+++ b/cmake/modules/LibffiUtils.cmake
@@ -9,6 +9,8 @@ function(setup_libffi libffi_srcroot)
     set(arch_dir "aarch64")
   elseif(${llarch} STREQUAL "x86_64")
     set(arch_dir "x86")
+  elseif(${llarch} STREQUAL "i686")
+    set(arch_dir "x86")
   else()
     message(SEND_ERROR "Arch ${llarch} not yet supported")
   endif()
diff --git a/driver/Driver.cpp b/driver/Driver.cpp
index 8debbab..aa83fb1 100644
--- a/driver/Driver.cpp
+++ b/driver/Driver.cpp
@@ -76,7 +76,7 @@ std::string Driver::installedLibDir()
       llvm::sys::path::append(ldir, "../lib64");
       break;
     default:
-      llvm::sys::path::append(ldir, "../lib64");
+      llvm::sys::path::append(ldir, "../lib");
       break;
   }
:
--- a/cmake/modules/LibffiUtils.cmake
+++ b/cmake/modules/LibffiUtils.cmake
@@ -9,6 +9,8 @@ function(setup_libffi libffi_srcroot)
     set(arch_dir "aarch64")
   elseif(${llarch} STREQUAL "x86_64")
     set(arch_dir "x86")
+  elseif(${llarch} STREQUAL "i686")
+    set(arch_dir "x86")
   else()
     message(SEND_ERROR "Arch ${llarch} not yet supported")
   endif()
diff --git a/driver/Driver.cpp b/driver/Driver.cpp
index 8debbab..aa83fb1 100644
--- a/driver/Driver.cpp
+++ b/driver/Driver.cpp
@@ -76,7 +76,7 @@ std::string Driver::installedLibDir()
       llvm::sys::path::append(ldir, "../lib64");
       break;
     default:
-      llvm::sys::path::append(ldir, "../lib64");
+      llvm::sys::path::append(ldir, "../lib");
       break;
   }
   return std::string(ldir.str());

and

$ git log -1
commit 850255c5cd7f9df79a148d537fd395089b7caf29 (HEAD -> master, origin/master, origin/HEAD)
Author: Ivan Serdyuk <local.tou...@gmail.com>
Date:   Fri Dec 4 17:14:00 2020 +0200

    gollvm: Updating README.md, to elevate the min. required version of Clang compiler
    
    Too many issues with Clang 9 - so let's assume Clang 10+
    
    Change-Id: Icf1a74148878b07fd941e5d525ac7e0c7f6bfdaf
    Reviewed-on: https://go-review.googlesource.com/c/gollvm/+/275473
    Reviewed-by: Than McIntosh <th...@google.com>
    Trust: Ian Lance Taylor <ia...@golang.org>

[Than McIntosh]

Thanks. The error you're seeing 

  "unable to determine target CPU features for target i686-pc-linux-gnu"

looks as though it's because i686-pc-linux-gnu isn't listed as a target in
driver/ArchCpusAttrs.h.

From the root of your repo, try

  $ cd tools
  $ go build capture-fcn-attributes.go
  $ ./capture-fcn-attributes -o ../driver/ArchCpusAttrs.h

and then give the gollvm build another try.

Thanks, Than

To view this discussion on the web visit https://groups.google.com/d/msgid/golang-nuts/399b00c6-8a6c-46aa-8397-b7d01cd85e44n%40googlegroups.com.

[Ivan Serdyuk]

I think a caught an error:

$ ./capture-fcn-attributes
llc run failed: llc: error: : error: unable to get target for 'aarch64-unknown-linux-gnu', see --version and --triple.

capture-fcn-attributes: err = exit status 1

. Hence that I didn't compile Aarch64 back-end, for LLVM:

$ llc --version
LLVM (http://llvm.org/):
  LLVM version 12.0.0git
  Optimized build.

  Default target: i686-pc-linux-gnu
  Host CPU: yonah

  Registered Targets:
    x86    - 32-bit X86: Pentium-Pro and above
    x86-64 - 64-bit X86: EM64T and AMD64

. So this would not run out-of-the-box.

 

[Than McIntosh]

Right, that would be expected.   The easiest thing to do is make sure that you're running cmake in your build area with 

   -DLLVM_TARGETS_TO_BUILD="all"

then you can build "llc" and "clang" , then update your path so that the freshly built llc/clang are picked up first. Once you have that set up, it should take care of the problem running "llc" from capture-fcn-attributes.

Than

[Ivan Serdyuk]

My current scenario assumes that I have compiled for x86 targets, to run Clang on an x86 machine. What should be done if it is not assumed to involve any other back-ends, during the build?

[Than McIntosh]

You can of course run capture-fcn-attributes with an explicit set of triples, e.g. 

 $ ./capture-fcn-attributes -o ../driver/ArchCpusAttrs.h -triples i686-pc-linux-gnu

which will get you off the ground... but you would not want to check in the resulting header. The values in ArchCpusAttrs.h have to cover all supported targets.

Than

[Ivan Serdyuk]

I assume that this should be enforced by CMake - so some build flag would be provided. So the "default" schema would be to cover all per-project architectures (not the llc derived ones).

So here is what was generated:

$ cat ../driver/ArchCpusAttrs.h
// DO NOT EDIT: this file auto-generated by the following command:
//
//    ./capture-fcn-attributes -o ../driver/ArchCpusAttrs.h -triples i686-pc-linux-gnu
//
// in combination with clang:
//
//  clang version 12.0.0
//

typedef struct {
  const char *cpu;
  const char *attrs;
} CpuAttrs;

typedef struct {
  const char *triple;
  const CpuAttrs *cpuattrs;
} TripleCpus;

// triple: i686-pc-linux-gnu
static const CpuAttrs attrs0[] = {
  // first entry is default cpu

  { "pentium4", "+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "alderlake", "+adx,+aes,+avx,+avx2,+avxvnni,+bmi,+bmi2,+cldemote,+clflushopt,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+hreset,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+ptwrite,+rdrnd,+rdseed,+sahf,+serialize,+sgx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+waitpkg,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "amdfam10", "+3dnow,+3dnowa,+cx16,+cx8,+fxsr,+lzcnt,+mmx,+popcnt,+prfchw,+sahf,+sse,+sse2,+sse3,+sse4a,+x87"},
  { "athlon", "+3dnow,+3dnowa,+cx8,+mmx,+x87"},
  { "athlon-4", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+x87"},
  { "athlon-fx", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "athlon-mp", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+x87"},
  { "athlon-tbird", "+3dnow,+3dnowa,+cx8,+mmx,+x87"},
  { "athlon-xp", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+x87"},
  { "athlon64", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "athlon64-sse3", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
  { "atom", "+cx16,+cx8,+fxsr,+mmx,+movbe,+sahf,+sse,+sse2,+sse3,+ssse3,+x87"},
  { "barcelona", "+3dnow,+3dnowa,+cx16,+cx8,+fxsr,+lzcnt,+mmx,+popcnt,+prfchw,+sahf,+sse,+sse2,+sse3,+sse4a,+x87"},
  { "bdver1", "+aes,+avx,+cx16,+cx8,+fma4,+fxsr,+lwp,+lzcnt,+mmx,+pclmul,+popcnt,+prfchw,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+x87,+xop,+xsave"},
  { "bdver2", "+aes,+avx,+bmi,+cx16,+cx8,+f16c,+fma,+fma4,+fxsr,+lwp,+lzcnt,+mmx,+pclmul,+popcnt,+prfchw,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+tbm,+x87,+xop,+xsave"},
  { "bdver3", "+aes,+avx,+bmi,+cx16,+cx8,+f16c,+fma,+fma4,+fsgsbase,+fxsr,+lwp,+lzcnt,+mmx,+pclmul,+popcnt,+prfchw,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+tbm,+x87,+xop,+xsave,+xsaveopt"},
  { "bdver4", "+aes,+avx,+avx2,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fma4,+fsgsbase,+fxsr,+lwp,+lzcnt,+mmx,+movbe,+mwaitx,+pclmul,+popcnt,+prfchw,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+tbm,+x87,+xop,+xsave,+xsaveopt"},
  { "bonnell", "+cx16,+cx8,+fxsr,+mmx,+movbe,+sahf,+sse,+sse2,+sse3,+ssse3,+x87"},
  { "broadwell", "+adx,+avx,+avx2,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "btver1", "+cx16,+cx8,+fxsr,+lzcnt,+mmx,+popcnt,+prfchw,+sahf,+sse,+sse2,+sse3,+sse4a,+ssse3,+x87"},
  { "btver2", "+aes,+avx,+bmi,+cx16,+cx8,+f16c,+fxsr,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+x87,+xsave,+xsaveopt"},
  { "c3", "+3dnow,+cx8,+mmx,+x87"},
  { "c3-2", "+cx8,+fxsr,+mmx,+sse,+x87"},
  { "cannonlake", "+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512ifma,+avx512vbmi,+avx512vl,+bmi,+bmi2,+clflushopt,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sgx,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "cascadelake", "+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+avx512vnni,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "cooperlake", "+adx,+aes,+avx,+avx2,+avx512bf16,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+avx512vnni,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "core-avx-i", "+avx,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "core-avx2", "+avx,+avx2,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "core2", "+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+ssse3,+x87"},
  { "corei7", "+cx16,+cx8,+fxsr,+mmx,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"},
  { "corei7-avx", "+avx,+cx16,+cx8,+fxsr,+mmx,+pclmul,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "geode", "+3dnow,+3dnowa,+cx8,+mmx,+x87"},
  { "goldmont", "+aes,+clflushopt,+cx16,+cx8,+fsgsbase,+fxsr,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "goldmont-plus", "+aes,+clflushopt,+cx16,+cx8,+fsgsbase,+fxsr,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+ptwrite,+rdpid,+rdrnd,+rdseed,+sahf,+sgx,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "haswell", "+avx,+avx2,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "i386", "+x87"},
  { "i486", "+x87"},
  { "i586", "+cx8,+x87"},
  { "i686", "+cx8,+x87"},
  { "icelake-client", "+adx,+aes,+avx,+avx2,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+gfni,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdpid,+rdrnd,+rdseed,+sahf,+sgx,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "icelake-server", "+adx,+aes,+avx,+avx2,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+gfni,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pconfig,+pku,+popcnt,+prfchw,+rdpid,+rdrnd,+rdseed,+sahf,+sgx,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+wbnoinvd,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "ivybridge", "+avx,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "k6", "+cx8,+mmx,+x87"},
  { "k6-2", "+3dnow,+cx8,+mmx,+x87"},
  { "k6-3", "+3dnow,+cx8,+mmx,+x87"},
  { "k8", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "k8-sse3", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
  { "knl", "+adx,+aes,+avx,+avx2,+avx512cd,+avx512er,+avx512f,+avx512pf,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prefetchwt1,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "knm", "+adx,+aes,+avx,+avx2,+avx512cd,+avx512er,+avx512f,+avx512pf,+avx512vpopcntdq,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prefetchwt1,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "lakemont", "+cx8"},
  { "nehalem", "+cx16,+cx8,+fxsr,+mmx,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"},
  { "nocona", "+cx16,+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
  { "opteron", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "opteron-sse3", "+3dnow,+3dnowa,+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
  { "penryn", "+cx16,+cx8,+fxsr,+mmx,+sahf,+sse,+sse2,+sse3,+sse4.1,+ssse3,+x87"},
  { "pentium", "+cx8,+x87"},
  { "pentium-m", "+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "pentium-mmx", "+cx8,+mmx,+x87"},
  { "pentium2", "+cx8,+fxsr,+mmx,+x87"},
  { "pentium3", "+cx8,+fxsr,+mmx,+sse,+x87"},
  { "pentium3m", "+cx8,+fxsr,+mmx,+sse,+x87"},
  { "pentium4m", "+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "pentiumpro", "+cx8,+x87"},
  { "prescott", "+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
  { "sandybridge", "+avx,+cx16,+cx8,+fxsr,+mmx,+pclmul,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt"},
  { "sapphirerapids", "+adx,+aes,+amx-bf16,+amx-int8,+amx-tile,+avx,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vp2intersect,+avx512vpopcntdq,+avxvnni,+bmi,+bmi2,+cldemote,+clflushopt,+clwb,+cx16,+cx8,+enqcmd,+f16c,+fma,+fsgsbase,+fxsr,+gfni,+invpcid,+lzcnt,+mmx,+movbe,+movdir64b,+movdiri,+pclmul,+pconfig,+pku,+popcnt,+prfchw,+ptwrite,+rdpid,+rdrnd,+rdseed,+sahf,+serialize,+sgx,+sha,+shstk,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+tsxldtrk,+uintr,+vaes,+vpclmulqdq,+waitpkg,+wbnoinvd,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "silvermont", "+cx16,+cx8,+fxsr,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"},
  { "skx", "+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "skylake", "+adx,+aes,+avx,+avx2,+bmi,+bmi2,+clflushopt,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sgx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "skylake-avx512", "+adx,+aes,+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+pclmul,+pku,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "slm", "+cx16,+cx8,+fxsr,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"},
  { "tigerlake", "+adx,+aes,+avx,+avx2,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vp2intersect,+avx512vpopcntdq,+bmi,+bmi2,+clflushopt,+clwb,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+gfni,+invpcid,+kl,+lzcnt,+mmx,+movbe,+movdir64b,+movdiri,+pclmul,+pku,+popcnt,+prfchw,+rdpid,+rdrnd,+rdseed,+sahf,+sgx,+sha,+shstk,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+widekl,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "tremont", "+aes,+clflushopt,+clwb,+cx16,+cx8,+fsgsbase,+fxsr,+gfni,+mmx,+movbe,+pclmul,+popcnt,+prfchw,+ptwrite,+rdpid,+rdrnd,+rdseed,+sahf,+sgx,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "westmere", "+cx16,+cx8,+fxsr,+mmx,+pclmul,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"},
  { "winchip-c6", "+cx8,+mmx,+x87"},
  { "winchip2", "+3dnow,+cx8,+mmx,+x87"},
  { "x86-64", "+cx8,+fxsr,+mmx,+sse,+sse2,+x87"},
  { "x86-64-v2", "+cx16,+cx8,+fxsr,+mmx,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87"},
  { "x86-64-v3", "+avx,+avx2,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"},
  { "x86-64-v4", "+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+cx16,+cx8,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave"},
  { "yonah", "+cx8,+fxsr,+mmx,+sse,+sse2,+sse3,+x87"},
  { "znver1", "+adx,+aes,+avx,+avx2,+bmi,+bmi2,+clflushopt,+clzero,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mwaitx,+pclmul,+popcnt,+prfchw,+rdrnd,+rdseed,+sahf,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "znver2", "+adx,+aes,+avx,+avx2,+bmi,+bmi2,+clflushopt,+clwb,+clzero,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+lzcnt,+mmx,+movbe,+mwaitx,+pclmul,+popcnt,+prfchw,+rdpid,+rdrnd,+rdseed,+sahf,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+wbnoinvd,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},
  { "znver3", "+adx,+aes,+avx,+avx2,+bmi,+bmi2,+clflushopt,+clwb,+clzero,+cx16,+cx8,+f16c,+fma,+fsgsbase,+fxsr,+invpcid,+lzcnt,+mmx,+movbe,+mwaitx,+pclmul,+pku,+popcnt,+prfchw,+rdpid,+rdrnd,+rdseed,+sahf,+sha,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+sse4a,+ssse3,+vaes,+vpclmulqdq,+wbnoinvd,+x87,+xsave,+xsavec,+xsaveopt,+xsaves"},

  { "", "" } // sentinel
};

const TripleCpus triples[] = {
  { "i686-pc-linux-gnu", &attrs0[0] },
  { "", nullptr } // sentinel
};

.

So the value was set to "pentium4", while

$ llc --version | grep CPU
  Host CPU: yonah

. It is even more confusing.

Now, I made further steps:

[3/3] Linking CXX executable bin/llvm-goc

$ ./bin/llvm-goc --version
gollvm version 1 (experimental) [LLVM version 12]

and

$ ninja libgo_golang.org_x_crypto_chacha20
[1/120] Building Go package 'unicode' (non-PIC)
FAILED: tools/gollvm/libgo/unicode.o
cd /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo && /usr/local/bin/cmake -E make_directory ./. && /home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc -c -o /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo/./unicode.o -fgo-pkgpath=unicode -I . /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/casetables.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/digit.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/graphic.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/letter.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/tables.go

.

I do not see any proof that

 

currently Gollvm is not supported on architecture i686

unsupported llvm::CallingConv::ID 1023
unsupported llvm::CallingConv::ID 1023
unsupported llvm::CallingConv::ID 1023

is beyond the ranks of the current issue.

#0 0x087a548a llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc+0x87a548a)
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: /home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc -c -o /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo/./unicode.o -fgo-pkgpath=unicode -I . /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/casetables.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/digit.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/graphic.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/letter.go /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/unicode/tables.go
Segmentation fault (core dumped)

[2/120] Building Go package 'internal/unsafeheader' (PIC)
FAILED: tools/gollvm/libgo/internal/.pic/unsafeheader.o
cd /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo && /usr/local/bin/cmake -E make_directory ./internal/.pic && /home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc -c -o /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo/internal/.pic/unsafeheader.o -fPIC -fgo-pkgpath=internal/unsafeheader -I . /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/internal/unsafeheader/unsafeheader.go
currently Gollvm is not supported on architecture i686

unsupported llvm::CallingConv::ID 1023
unsupported llvm::CallingConv::ID 1023
unsupported llvm::CallingConv::ID 1023
#0 0x087a548a llvm::sys::PrintStackTrace(llvm::raw_ostream&, int) (/home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc+0x87a548a)
PLEASE submit a bug report to https://bugs.llvm.org/ and include the crash backtrace.
Stack dump:
0. Program arguments: /home/oceanfish81/Desktop/workarea/release/./bin/llvm-goc -c -o /home/oceanfish81/Desktop/workarea/release/tools/gollvm/libgo/internal/.pic/unsafeheader.o -fPIC -fgo-pkgpath=internal/unsafeheader -I . /home/oceanfish81/Desktop/workarea/llvm-project/llvm/tools/gollvm/gofrontend/libgo/go/internal/unsafeheader/unsafeheader.go
Segmentation fault (core dumped)

.

So I don't see what is the next step (and what to do with "pentium4" versus "yonah").

I am super sure that some patch is required, to provide consistent automation of build.

[Ivan Serdyuk]

CC'ing to Jayesh, Sreenivas, Adarsh from Intel.

I am BCC'ing to Sameeran, Tejas from AMD.