[go] runtime: support -buildmode=c-shared on linux/mips64le

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xiaodong liu (Gerrit)

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runtime: support -buildmode=c-shared on linux/mips64le

For golang/go#43264

Signed-off-by: Xiaodong Liu <liuxi...@loongson.cn>
Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
M src/runtime/asm_mips64x.s
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/asm_mips64x.s
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/rt0_linux_mips64x.s
M src/runtime/tls_mips64x.s
6 files changed, 192 insertions(+), 9 deletions(-)

diff --git a/src/runtime/asm_mips64x.s b/src/runtime/asm_mips64x.s
index e0e5cbb..086614e 100644
--- a/src/runtime/asm_mips64x.s
+++ b/src/runtime/asm_mips64x.s
@@ -432,10 +432,12 @@
MOVV m_g0(R5), R6
BEQ R6, g, g0

+ MOVV R25, R15 // call to save_g clobbers R25 when buildmode=c-shared
JAL gosave_systemstack_switch<>(SB)
MOVV R6, g
JAL runtime·save_g(SB)
MOVV (g_sched+gobuf_sp)(g), R29
+ MOVV R15, R25

// Now on a scheduling stack (a pthread-created stack).
g0:
diff --git a/src/runtime/cgo/abi_mips64x.h b/src/runtime/cgo/abi_mips64x.h
new file mode 100644
index 0000000..302b7e7
--- /dev/null
+++ b/src/runtime/cgo/abi_mips64x.h
@@ -0,0 +1,79 @@
+// Copyright 2021 The Go Authors. All rights reserved.
+// Use of this source code is governed by a BSD-style
+// license that can be found in the LICENSE file.
+
+// Macros for transitioning from the host ABI to Go ABI0.
+//
+// These save the frame pointer, so in general, functions that use
+// these should have zero frame size to suppress the automatic frame
+// pointer, though it's harmless to not do this.
+
+#ifdef GOARCH_mips64le
+
+// PUSH_REGS_HOST_TO_ABI0 prepares for transitioning from
+// the host ABI to Go ABI0 code. It saves all registers that are
+// callee-save in the host ABI and caller-save in Go ABI0 and prepares
+// for entry to Go.
+//
+// Save R16-R23 R28 R29 R30 R31 F20-F31 registers for hardfloat.
+// Save R16-R23 R28 R29 R30 R31 registers for softfloat.
+#ifdef GOMIPS64_hardfloat
+#define PUSH_REGS_FLOAT_PART() \
+ MOVF F20, 120(R29) \
+ MOVF F21, 128(R29) \
+ MOVF F22, 136(R29) \
+ MOVF F23, 144(R29) \
+ MOVF F24, 152(R29) \
+ MOVF F25, 160(R29) \
+ MOVF F26, 168(R29) \
+ MOVF F27, 176(R29) \
+ MOVF F28, 184(R29) \
+ MOVF F29, 192(R29) \
+ MOVF F30, 200(R29) \
+ MOVF F31, 208(R29)
+
+#define POP_REGS_FLOAT_PART() \
+ MOVF 120(R29), F20 \
+ MOVF 128(R29), F21 \
+ MOVF 136(R29), F22 \
+ MOVF 144(R29), F23 \
+ MOVF 152(R29), F24 \
+ MOVF 160(R29), F25 \
+ MOVF 168(R29), F26 \
+ MOVF 176(R29), F27 \
+ MOVF 184(R29), F28 \
+ MOVF 192(R29), F29 \
+ MOVF 200(R29), F30 \
+ MOVF 208(R29), F31
+#endif
+
+#define PUSH_REGS_HOST_TO_ABI0() \
+ MOVV R16, 24(R29) \
+ MOVV R17, 32(R29) \
+ MOVV R18, 40(R29) \
+ MOVV R19, 48(R29) \
+ MOVV R20, 56(R29) \
+ MOVV R21, 64(R29) \
+ MOVV R22, 72(R29) \
+ MOVV R23, 80(R29) \
+ MOVV RSB, 88(R29) \
+ MOVV R29, 96(R29) \
+ MOVV g, 104(R29) \
+ MOVV R31, 112(R29) \
+ PUSH_REGS_FLOAT_PART()
+
+#define POP_REGS_HOST_TO_ABI0() \
+ MOVV 24(R29), R16 \
+ MOVV 32(R29), R17 \
+ MOVV 40(R29), R18 \
+ MOVV 48(R29), R19 \
+ MOVV 56(R29), R20 \
+ MOVV 64(R29), R21 \
+ MOVV 72(R29), R22 \
+ MOVV 80(R29), R23 \
+ MOVV 88(R29), RSB \
+ MOVV 96(R29), R29 \
+ MOVV 104(R29), g \
+ MOVV 112(R29), R31 \
+ POP_REGS_FLOAT_PART()
+#endif
diff --git a/src/runtime/cgo/asm_mips64x.s b/src/runtime/cgo/asm_mips64x.s
index ba94807..794dc62 100644
--- a/src/runtime/cgo/asm_mips64x.s
+++ b/src/runtime/cgo/asm_mips64x.s
@@ -47,11 +47,23 @@
MOVD F30, (8*21)(R29)
MOVD F31, (8*22)(R29)
#endif
+ MOVV 0(R25), R14 //R25 saved the start address of function crosscall2
+ SRLV $16, R14, R14
+ //crosscall2 begin with lui instruction when buildmode=c-shared
+ //The "lui" instruction is added by editSharedFunc function in src/cmd/internal/obj/mips/obj.go
+ //0x3c1c represents high 16 bit of the machine code "lui gp, 0x0" on mips64x
+ //The "lui" instruction is used to determine buildmode=c-shared here
+ MOVV $0x3c1c, R15
+ AND R14, R15, R14
+ //When buildmode=c-shared, the binary is PIC code, and gp register hold the GOT address in MIPS ABI
+ //The GOT address is calculated by lui+daddu+daddiu instructions at the beginning of crosscall2 function
+ BEQ R14, R15, shared
// Initialize Go ABI environment
// prepare SB register = PC & 0xffffffff00000000
BGEZAL R0, 1(PC)
SRLV $32, R31, RSB
SLLV $32, RSB
+shared:
JAL runtime·load_g(SB)

JAL runtime·cgocallback(SB)
diff --git a/src/runtime/cgo/gcc_mips64x.S b/src/runtime/cgo/gcc_mips64x.S
index 908dd21..9363d31 100644
--- a/src/runtime/cgo/gcc_mips64x.S
+++ b/src/runtime/cgo/gcc_mips64x.S
@@ -15,9 +15,9 @@
.set noat
crosscall1:
#ifndef __mips_soft_float
- daddiu $29, $29, -160
+ daddiu $29, $29, -168
#else
- daddiu $29, $29, -96 // For soft-float, no need to make room for FP registers
+ daddiu $29, $29, -104 // For soft-float, no need to make room for FP registers
#endif
sd $31, 0($29)
sd $16, 8($29)
@@ -49,9 +49,22 @@

move $20, $4 // save R4
move $1, $6
- jalr $5 // call setg_gcc (clobbers R4)
- jalr $20 // call fn
-
+ //It is a ABI convention that to call a function must use t9 (i.e.R25) register in MIPS PIC code.
+ //So save r25 and move call target to r25 register, and then call the function.
+#ifndef __mips_soft_float
+ sd $25, 152($29)
+#else
+ sd $25, 88($29)
+#endif
+ move $25, $5
+ jalr $25 // call setg_gcc (clobbers R4)
+ move $25, $20
+ jalr $25 // call fn
+#ifndef __mips_soft_float
+ ld $25, 152($29)
+#else
+ ld $25, 88($29)
+#endif
ld $16, 8($29)
ld $17, 16($29)
ld $18, 24($29)
@@ -74,9 +87,9 @@
#endif
ld $31, 0($29)
#ifndef __mips_soft_float
- daddiu $29, $29, 160
+ daddiu $29, $29, 168
#else
- daddiu $29, $29, 96
+ daddiu $29, $29, 104
#endif
jr $31

diff --git a/src/runtime/rt0_linux_mips64x.s b/src/runtime/rt0_linux_mips64x.s
index fabd857..ff088cf 100644
--- a/src/runtime/rt0_linux_mips64x.s
+++ b/src/runtime/rt0_linux_mips64x.s
@@ -7,6 +7,7 @@
// +build mips64 mips64le

#include "textflag.h"
+#include "cgo/abi_mips64x.h"

TEXT _rt0_mips64_linux(SB),NOSPLIT,$0
JMP _main<>(SB)
@@ -27,6 +28,58 @@
ADDV $8, R29, R5 // argv
JMP main(SB)

+// When building with -buildmode=c-shared, this symbol is called when the shared
+// library is loaded.
+#ifdef GOMIPS64_hardfloat
+TEXT _rt0_mips64le_linux_lib(SB),NOSPLIT,$232
+#else
+TEXT _rt0_mips64le_linux_lib(SB),NOSPLIT,$136
+#endif
+ // Preserve callee-save registers.
+ PUSH_REGS_HOST_TO_ABI0()
+
+ // Initialize g as null in case of using g later e.g. sigaction in cgo_sigaction.go
+ MOVV R0, g
+
+ MOVV R4, _rt0_mips64le_linux_lib_argc<>(SB)
+ MOVV R5, _rt0_mips64le_linux_lib_argv<>(SB)
+
+ // Synchronous initialization.
+ MOVV $runtime·libpreinit(SB), R1
+ JAL (R1)
+
+ // Create a new thread to do the runtime initialization and return.
+ MOVV _cgo_sys_thread_create(SB), R1
+ BEQ R1, nocgo
+ MOVV $_rt0_mips64le_linux_lib_go(SB), R4
+ MOVV $0, R5
+ JAL (R1)
+ JMP restore
+
+nocgo:
+ MOVV $0x800000, R4 // stacksize = 8192KB
+ MOVV $_rt0_mips64le_linux_lib_go(SB), R5
+ MOVV R4, 8(R29)
+ MOVV R5, 16(R29)
+ MOVV $runtime·newosproc0(SB),R1
+ JAL (R1)
+
+restore:
+ // Restore callee-save registers.
+ POP_REGS_HOST_TO_ABI0()
+ RET
+
+TEXT _rt0_mips64le_linux_lib_go(SB),NOSPLIT,$0
+ MOVV _rt0_mips64le_linux_lib_argc<>(SB), R4
+ MOVV _rt0_mips64le_linux_lib_argv<>(SB), R5
+ MOVV $runtime·rt0_go(SB),R1
+ JMP (R1)
+
+DATA _rt0_mips64le_linux_lib_argc<>(SB)/8, $0
+GLOBL _rt0_mips64le_linux_lib_argc<>(SB),NOPTR, $8
+DATA _rt0_mips64le_linux_lib_argv<>(SB)/8, $0
+GLOBL _rt0_mips64le_linux_lib_argv<>(SB),NOPTR, $8
+
TEXT main(SB),NOSPLIT|NOFRAME,$0
// in external linking, glibc jumps to main with argc in R4
// and argv in R5
diff --git a/src/runtime/tls_mips64x.s b/src/runtime/tls_mips64x.s
index 779d64b..1637f4f 100644
--- a/src/runtime/tls_mips64x.s
+++ b/src/runtime/tls_mips64x.s
@@ -17,15 +17,39 @@
MOVB runtime·iscgo(SB), R23
BEQ R23, nocgo

+ MOVV R31,-32(R29)
+ ADDV $-32, R29
+ MOVV R2, 8(R29)
+ MOVV R4, 16(R29)
+ MOVV R25, 24(R29)
MOVV R3, R23 // save R3
- MOVV g, runtime·tls_g(SB) // TLS relocation clobbers R3
+ // TLS relocation clobbers R2,R4,R25 when buildmode=c-shared
+ // TLS relocation clobbers R3 when buildmode=exe
+ MOVV g, runtime·tls_g(SB)
MOVV R23, R3 // restore R3
+ MOVV 8(R29),R2
+ MOVV 16(R29),R4
+ MOVV 24(R29),R25
+ MOVV 0(R29), R31
+ ADDV $32, R29

nocgo:
RET

TEXT runtime·load_g(SB),NOSPLIT|NOFRAME,$0-0
- MOVV runtime·tls_g(SB), g // TLS relocation clobbers R3
+ MOVV R31,-32(R29)
+ ADDV $-32, R29
+ MOVV R2, 8(R29)
+ MOVV R4, 16(R29)
+ MOVV R25, 24(R29)
+ // TLS relocation clobbers R2,R4,R25 when buildmode=c-shared
+ // TLS relocation clobbers R3 when buildmode=exe
+ MOVV runtime·tls_g(SB), g
+ MOVV 8(R29),R2
+ MOVV 16(R29),R4
+ MOVV 24(R29),R25
+ MOVV 0(R29), R31
+ ADDV $32, R29
RET

GLOBL runtime·tls_g(SB), TLSBSS, $8

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xiaodong liu (Gerrit)

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xiaodong liu uploaded patch set #5 to this change.

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runtime: support -buildmode=c-shared on linux/mips64le

For #43264


Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
M src/runtime/asm_mips64x.s
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/asm_mips64x.s
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/rt0_linux_mips64x.s
M src/runtime/tls_mips64x.s
6 files changed, 192 insertions(+), 9 deletions(-)

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1 comment:

  • Patchset:

    • Patch Set #5:

      Dear Austin Clements,

      Thanks for your code review, I am so sorry that I abandoned original CL. To build a relation chain on Gerrit, I submit this CL.

      I have completed the fixes to your review.

      Thanks!

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xiaodong liu uploaded patch set #6 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64le

The entrypoint is different between shared library and executable file,
we need to add a new entrypoint(_rt0_mips64le_linux_lib) to support c-shared
mode on linux/mips64le.

TLS mode also change on c-shared mode, GD mode is used. The implementation of
save_g and load_g functions need to adapt to GD mode. Compare to static code,
The TLS operation in PIC code could clobbers R2, R4, R25 registers, so we must
save and restore these register.

That call a C function could change r28(gp) since the GOT address is different
among modules, we should compute the GOT address when start up the the runtime
and call back to Go function. When C function call back to Go function, we need
to determinate which buildmode we used currently and calculate gp correctly.


For #43264

Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
M src/runtime/asm_mips64x.s
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/asm_mips64x.s
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/rt0_linux_mips64x.s
M src/runtime/tls_mips64x.s
6 files changed, 192 insertions(+), 9 deletions(-)

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xiaodong liu uploaded patch set #7 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64le

The entrypoint is different between shared library and executable file,
we need to add a new entrypoint(_rt0_mips64le_linux_lib) to support
c-shared mode on linux/mips64le.

TLS mode also change on c-shared mode, GD mode is used. The
implementation of save_g and load_g functions need to adapt to
GD mode. Compare to static code, the TLS operation in PIC code

could clobbers R2, R4, R25 registers, so we must save and restore
these register.

That call a C function could change r28(gp) since the GOT address
is different among modules, we should compute the GOT address when
start up the the runtime and call back to Go function. When C function
call back to Go function, we need to determinate which buildmode we
used currently and calculate gp correctly.

For #43264

Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
M src/runtime/asm_mips64x.s
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/asm_mips64x.s
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/rt0_linux_mips64x.s
M src/runtime/tls_mips64x.s
6 files changed, 192 insertions(+), 9 deletions(-)

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Gerrit-Change-Number: 348735
Gerrit-PatchSet: 7

xiaodong liu (Gerrit)

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xiaodong liu uploaded patch set #9 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64{,le}


The entrypoint is different between shared library and executable file,
we need to add a new entrypoint(_rt0_mips64le_linux_lib) to support
c-shared mode on linux/mips64le.

TLS mode also change on c-shared mode, GD mode is used. The
implementation of save_g and load_g functions need to adapt to
GD mode. Compare to static code, the TLS operation in PIC code
could clobbers R2, R4, R25 registers, so we must save and restore
these register.

That call a C function could change r28(gp) since the GOT address
is different among modules, we should compute the GOT address when
start up the the runtime and call back to Go function. When C function
call back to Go function, we need to determinate which buildmode we
used currently and calculate gp correctly.

For #43264

Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/asm_mips64x.s
M src/runtime/cgo/asm_mips64x.s
M src/runtime/rt0_linux_mips64x.s
M src/runtime/tls_mips64x.s
6 files changed, 224 insertions(+), 9 deletions(-)

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xiaodong liu uploaded patch set #11 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64{,le}

The entrypoint is different between shared library and executable file,
we need to add new entrypoint(_rt0_mips64le_linux_lib/_rt0_mips64_linux_
lib) to support c-shared mode on linux/mips64{,le}.
Gerrit-PatchSet: 11

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xiaodong liu uploaded patch set #12 to this change.

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xiaodong liu uploaded patch set #16 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64{,le}

The entrypoint is different between shared library and executable file,
we need to add new entrypoint(_rt0_mips64le_linux_lib/_rt0_mips64_linux_
lib) to support c-shared mode on linux/mips64{,le}.

TLS mode also change on c-shared mode, GD mode is used. The
implementation of save_g and load_g functions need to adapt to
GD mode. Compare to static code, the TLS operation in PIC code
could clobbers R2, R4, R25 registers, so we must save and restore
these register.

That call a C function could change r28(gp) since the GOT address
is different among modules, we should compute the GOT address when
start up the the runtime and call back to Go function. When C function
call back to Go function, we need to determinate which buildmode we
used currently and calculate gp correctly.

For #43264

Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/sys_linux_mips64x.s

M src/runtime/asm_mips64x.s
M src/runtime/cgo/asm_mips64x.s
M src/runtime/rt0_linux_mips64x.s
M src/runtime/tls_mips64x.s
7 files changed, 237 insertions(+), 9 deletions(-)

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xiaodong liu uploaded patch set #18 to this change.

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xiaodong liu uploaded patch set #19 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64{,le}

The entrypoint is different between shared library and executable file,
we need to add new entrypoint(_rt0_mips64le_linux_lib/_rt0_mips64_linux_
lib) to support c-shared mode on linux/mips64{,le}.

When buildmode=c-shared, TLS mode is changed to GD mode. The implementation

of save_g and load_g functions need to adapt to GD mode. Compare to static
code, the TLS operation in PIC code could clobber R2, R4, R25 registers, so
we must save and restore these registers.

Each module has a separate GOT address and r28 holds the GOT address on
mips64{,le}. That call a C function that is in other module could clobber r28
register. When a C function call back to Go function, we need to calculate
GOT address again.

In static code and PIC code, r28 has different use. We need to determinate
which buildmode we used currently and calculate r28 correctly.


For #43264

Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/sys_linux_mips64x.s
M src/runtime/asm_mips64x.s
M src/runtime/cgo/asm_mips64x.s
M src/runtime/rt0_linux_mips64x.s
M src/runtime/tls_mips64x.s
7 files changed, 240 insertions(+), 9 deletions(-)

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xiaodong liu (Gerrit)

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xiaodong liu uploaded patch set #27 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64{,le}

The entrypoint is different between shared library and executable file,
we need to add new entrypoint(_rt0_mips64le_linux_lib/_rt0_mips64_linux_
lib) to support c-shared mode on linux/mips64{,le}.

When buildmode=c-shared, TLS mode is changed to GD mode. The implementation
of save_g and load_g functions need to adapt to GD mode. Compare to static
code, the TLS operation in PIC code could clobber R2, R4, R25 registers, so
we must save and restore these registers.

Each module has a separate GOT address and r28 holds the GOT address on
mips64{,le}. That call a C function that is in other module could clobber r28
register. When a C function call back to Go function, we need to calculate
GOT address again.

In static code and PIC code, r28 has different use. We need to determinate
which buildmode we used currently and calculate r28 correctly.

For #43264

Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
M src/runtime/asm_mips64x.s
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/asm_mips64x.s
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/rt0_linux_mips64x.s
M src/runtime/sys_linux_mips64x.s

M src/runtime/tls_mips64x.s
7 files changed, 240 insertions(+), 9 deletions(-)

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Cherry Mui (Gerrit)

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May 20, 2022, 11:15:41 AM5/20/22
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View Change

1 comment:

  • Patchset:

    • Patch Set #30:

      I'll review once the earlier CLs (348733, 348734) on the stack are done. Thanks.

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xiaodong liu (Gerrit)

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1 comment:

  • Patchset:

    • Patch Set #30:

      I'll review once the earlier CLs (348733, 348734) on the stack are done. Thanks.

    • Sorry for the delay, I meet a coredump error after rebased code. I'll fix it as soon as possible.
      Thanks!

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xiaodong liu uploaded patch set #31 to this change.

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Cherry Mui (Gerrit)

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View Change

6 comments:

  • File src/runtime/cgo/abi_mips64x.h:

  • File src/runtime/cgo/gcc_mips64x.S:

  • File src/runtime/rt0_linux_mips64x.s:

  • File src/runtime/sys_linux_mips64x.s:

    • Patch Set #31, Line 412:

              // runtime.sigtramp begin with lui instruction when buildmode=c-shared
      // The "lui" instruction is added by editSharedFunc function in src/cmd/internal/obj/mips/obj.go
      // 0x3c1c represents high 16 bit of the machine code "lui gp, 0x0" on mips64x
      // The "lui" instruction is used to determine buildmode=c-shared here

      Instead of checking the instruction, I think we should check the build mode statically. Maybe define a macro like https://cs.opensource.google/go/go/+/master:src/cmd/go/internal/work/gc.go;l=372 and check it with #ifdef.

  • File src/runtime/tls_mips64x.s:

    • Patch Set #31, Line 21:

      	MOVV	R2, 8(R29)
      MOVV R4, 16(R29)
      MOVV R25, 24(R29)

      I don't think you need to preserve these registers. Just update the comment above and change the callers to not use them.

      Also below.

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xiaodong liu uploaded patch set #32 to this change.

View Change

runtime: support -buildmode=c-shared on linux/mips64{,le}

The entrypoint is different between shared library and executable file,
we need to add new entrypoint(_rt0_mips64le_linux_lib/_rt0_mips64_linux_
lib) to support c-shared mode on linux/mips64{,le}.

When buildmode=c-shared, TLS mode is changed to GD mode. The implementation
of save_g and load_g functions need to adapt to GD mode. Compare to static
code, the TLS operation in PIC code could clobber R2, R4, R25 registers, so
we must save and restore these registers.

Each module has a separate GOT address and r28 holds the GOT address on
mips64{,le}. That call a C function that is in other module could clobber r28
register. When a C function call back to Go function, we need to calculate
GOT address again.

In static code and PIC code, r28 has different use. We need to determinate
which buildmode we used currently and calculate r28 correctly.

For #43264

Change-Id: I7b1107c6cef4aded175c0a8acba8e60ccb5e6c98
---
M src/runtime/asm_mips64x.s
A src/runtime/cgo/abi_mips64x.h
M src/runtime/cgo/asm_mips64x.s
M src/runtime/cgo/gcc_mips64x.S
M src/runtime/rt0_linux_mips64x.s
M src/runtime/sys_linux_mips64x.s
M src/runtime/sys_openbsd_mips64.s
M src/runtime/tls_mips64x.s
8 files changed, 220 insertions(+), 10 deletions(-)

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6 comments:

  • File src/runtime/cgo/abi_mips64x.h:

    • Yes, I fixed it.

  • File src/runtime/cgo/gcc_mips64x.S:

    • Yes, I fixed it.

    • Patch Set #31, Line 53: save r25

      Why do you need to save R25? This function doesn't seem necessary to preserve R25.

    • Yes, we reserved R25 in register allocator, it is not necessary to preserve R25 here.

  • File src/runtime/rt0_linux_mips64x.s:

    • Yes, I fixed it.

  • File src/runtime/sys_linux_mips64x.s:

    • Patch Set #31, Line 412:

              // runtime.sigtramp begin with lui instruction when buildmode=c-shared
      // The "lui" instruction is added by editSharedFunc function in src/cmd/internal/obj/mips/obj.go
      // 0x3c1c represents high 16 bit of the machine code "lui gp, 0x0" on mips64x
      // The "lui" instruction is used to determine buildmode=c-shared here

  • File src/runtime/tls_mips64x.s:

    • I don't think you need to preserve these registers. […]

      Thanks very much. But I think we need to preserve these registers since load/store a TLS variable might clobber these registers under c-shared buildmode.


    • > Just update the comment above and change the callers to not use them.

    • Since the callers' code might be changed, I think it is hard to maintain and change that the callers to not use these registers. I prefer that we can save and restore these registers here.
      In addition, I use "GOBUILDMODE_shared" macro to load/store these registers on c-shared buildmode only.

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Cherry Mui (Gerrit)

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3 comments:

    • Yes, we reserved R25 in register allocator, it is not necessary to preserve R25 here.

    • This function is called from C, so the Go register allocator shouldn't matter. (The code is fine, just FYI.)

  • File src/runtime/cgo/gcc_mips64x.S:

  • File src/runtime/tls_mips64x.s:

    • Thanks very much. […]

      This function and the next one are only called in specific places in the runtime, which don't change very often, and usually don't need to use many registers. So I think it's better to change the caller.
      Also I think it is better for this function to not use the stack.

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xiaodong liu uploaded patch set #33 to this change.

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8 files changed, 218 insertions(+), 8 deletions(-)

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3 comments:

  • File src/runtime/cgo/gcc_mips64x.S:

    • This function is called from C, so the Go register allocator shouldn't matter. […]

      Thanks!

  • File src/runtime/cgo/gcc_mips64x.S:

    • Yes, Done.

  • File src/runtime/tls_mips64x.s:

    • This function and the next one are only called in specific places in the runtime, which don't change […]

      When I debug the "runtime.load_g" function, I find that call C function directly from this:
      `MOVV runtime·tls_g(SB), g // in GD mode, get TLS address through ___tls_get_addr`
      I think it is not right, "___tls_get_addr" function should be wrapped. Then call the C funtion by cgo. And I want to hear your thoughts.

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