[sys] sys/cpu: modify x86 port to match what internal/cpu does

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Keith Randall (Gerrit)

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Dec 18, 2025, 7:45:11 PM (17 hours ago) Dec 18
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Commit message

sys/cpu: modify x86 port to match what internal/cpu does

The way we call isSet is different in the two. Normalize x/sys
to match internal/cpu.

This was done using (mostly) gopls' quick fix, to ensure we
don't miss any of the transpositions.
Change-Id: I0b66152e194d46ed9299550e12641cc798f8b11b

Change diff

diff --git a/cpu/cpu_x86.go b/cpu/cpu_x86.go
index 1e642f3..a5b5b5d 100644
--- a/cpu/cpu_x86.go
+++ b/cpu/cpu_x86.go
@@ -73,90 +73,90 @@
}

_, _, ecx1, edx1 := cpuid(1, 0)
- X86.HasSSE2 = isSet(26, edx1)
+ X86.HasSSE2 = isSet(edx1, 1<<26)

- X86.HasSSE3 = isSet(0, ecx1)
- X86.HasPCLMULQDQ = isSet(1, ecx1)
- X86.HasSSSE3 = isSet(9, ecx1)
- X86.HasFMA = isSet(12, ecx1)
- X86.HasCX16 = isSet(13, ecx1)
- X86.HasSSE41 = isSet(19, ecx1)
- X86.HasSSE42 = isSet(20, ecx1)
- X86.HasPOPCNT = isSet(23, ecx1)
- X86.HasAES = isSet(25, ecx1)
- X86.HasOSXSAVE = isSet(27, ecx1)
- X86.HasRDRAND = isSet(30, ecx1)
+ X86.HasSSE3 = isSet(ecx1, 1<<0)
+ X86.HasPCLMULQDQ = isSet(ecx1, 1<<1)
+ X86.HasSSSE3 = isSet(ecx1, 1<<9)
+ X86.HasFMA = isSet(ecx1, 1<<12)
+ X86.HasCX16 = isSet(ecx1, 1<<13)
+ X86.HasSSE41 = isSet(ecx1, 1<<19)
+ X86.HasSSE42 = isSet(ecx1, 1<<20)
+ X86.HasPOPCNT = isSet(ecx1, 1<<23)
+ X86.HasAES = isSet(ecx1, 1<<25)
+ X86.HasOSXSAVE = isSet(ecx1, 1<<27)
+ X86.HasRDRAND = isSet(ecx1, 1<<30)

var osSupportsAVX, osSupportsAVX512 bool
// For XGETBV, OSXSAVE bit is required and sufficient.
if X86.HasOSXSAVE {
eax, _ := xgetbv()
// Check if XMM and YMM registers have OS support.
- osSupportsAVX = isSet(1, eax) && isSet(2, eax)
+ osSupportsAVX = isSet(eax, 1<<1) && isSet(eax, 1<<2)

if runtime.GOOS == "darwin" {
// Darwin requires special AVX512 checks, see cpu_darwin_x86.go
osSupportsAVX512 = osSupportsAVX && darwinSupportsAVX512()
} else {
// Check if OPMASK and ZMM registers have OS support.
- osSupportsAVX512 = osSupportsAVX && isSet(5, eax) && isSet(6, eax) && isSet(7, eax)
+ osSupportsAVX512 = osSupportsAVX && isSet(eax, 1<<5) && isSet(eax, 1<<6) && isSet(eax, 1<<7)
}
}

- X86.HasAVX = isSet(28, ecx1) && osSupportsAVX
+ X86.HasAVX = isSet(ecx1, 1<<28) && osSupportsAVX

if maxID < 7 {
return
}

eax7, ebx7, ecx7, edx7 := cpuid(7, 0)
- X86.HasBMI1 = isSet(3, ebx7)
- X86.HasAVX2 = isSet(5, ebx7) && osSupportsAVX
- X86.HasBMI2 = isSet(8, ebx7)
- X86.HasERMS = isSet(9, ebx7)
- X86.HasRDSEED = isSet(18, ebx7)
- X86.HasADX = isSet(19, ebx7)
+ X86.HasBMI1 = isSet(ebx7, 1<<3)
+ X86.HasAVX2 = isSet(ebx7, 1<<5) && osSupportsAVX
+ X86.HasBMI2 = isSet(ebx7, 1<<8)
+ X86.HasERMS = isSet(ebx7, 1<<9)
+ X86.HasRDSEED = isSet(ebx7, 1<<18)
+ X86.HasADX = isSet(ebx7, 1<<19)

- X86.HasAVX512 = isSet(16, ebx7) && osSupportsAVX512 // Because avx-512 foundation is the core required extension
+ X86.HasAVX512 = isSet(ebx7, 1<<16) && osSupportsAVX512 // Because avx-512 foundation is the core required extension
if X86.HasAVX512 {
X86.HasAVX512F = true
- X86.HasAVX512CD = isSet(28, ebx7)
- X86.HasAVX512ER = isSet(27, ebx7)
- X86.HasAVX512PF = isSet(26, ebx7)
- X86.HasAVX512VL = isSet(31, ebx7)
- X86.HasAVX512BW = isSet(30, ebx7)
- X86.HasAVX512DQ = isSet(17, ebx7)
- X86.HasAVX512IFMA = isSet(21, ebx7)
- X86.HasAVX512VBMI = isSet(1, ecx7)
- X86.HasAVX5124VNNIW = isSet(2, edx7)
- X86.HasAVX5124FMAPS = isSet(3, edx7)
- X86.HasAVX512VPOPCNTDQ = isSet(14, ecx7)
- X86.HasAVX512VPCLMULQDQ = isSet(10, ecx7)
- X86.HasAVX512VNNI = isSet(11, ecx7)
- X86.HasAVX512GFNI = isSet(8, ecx7)
- X86.HasAVX512VAES = isSet(9, ecx7)
- X86.HasAVX512VBMI2 = isSet(6, ecx7)
- X86.HasAVX512BITALG = isSet(12, ecx7)
+ X86.HasAVX512CD = isSet(ebx7, 1<<28)
+ X86.HasAVX512ER = isSet(ebx7, 1<<27)
+ X86.HasAVX512PF = isSet(ebx7, 1<<26)
+ X86.HasAVX512VL = isSet(ebx7, 1<<31)
+ X86.HasAVX512BW = isSet(ebx7, 1<<30)
+ X86.HasAVX512DQ = isSet(ebx7, 1<<17)
+ X86.HasAVX512IFMA = isSet(ebx7, 1<<21)
+ X86.HasAVX512VBMI = isSet(ecx7, 1<<1)
+ X86.HasAVX5124VNNIW = isSet(edx7, 1<<2)
+ X86.HasAVX5124FMAPS = isSet(edx7, 1<<3)
+ X86.HasAVX512VPOPCNTDQ = isSet(ecx7, 1<<14)
+ X86.HasAVX512VPCLMULQDQ = isSet(ecx7, 1<<10)
+ X86.HasAVX512VNNI = isSet(ecx7, 1<<11)
+ X86.HasAVX512GFNI = isSet(ecx7, 1<<8)
+ X86.HasAVX512VAES = isSet(ecx7, 1<<9)
+ X86.HasAVX512VBMI2 = isSet(ecx7, 1<<6)
+ X86.HasAVX512BITALG = isSet(ecx7, 1<<12)
}

- X86.HasAMXTile = isSet(24, edx7)
- X86.HasAMXInt8 = isSet(25, edx7)
- X86.HasAMXBF16 = isSet(22, edx7)
+ X86.HasAMXTile = isSet(edx7, 1<<24)
+ X86.HasAMXInt8 = isSet(edx7, 1<<25)
+ X86.HasAMXBF16 = isSet(edx7, 1<<22)

// These features depend on the second level of extended features.
if eax7 >= 1 {
eax71, _, _, edx71 := cpuid(7, 1)
if X86.HasAVX512 {
- X86.HasAVX512BF16 = isSet(5, eax71)
+ X86.HasAVX512BF16 = isSet(eax71, 1<<5)
}
if X86.HasAVX {
- X86.HasAVXIFMA = isSet(23, eax71)
- X86.HasAVXVNNI = isSet(4, eax71)
- X86.HasAVXVNNIInt8 = isSet(4, edx71)
+ X86.HasAVXIFMA = isSet(eax71, 1<<23)
+ X86.HasAVXVNNI = isSet(eax71, 1<<4)
+ X86.HasAVXVNNIInt8 = isSet(edx71, 1<<4)
}
}
}

-func isSet(bitpos uint, value uint32) bool {
- return value&(1<<bitpos) != 0
+func isSet(hwc uint32, value uint32) bool {
+ return hwc&value != 0
}

Change information

Files:
  • M cpu/cpu_x86.go
Change size: M
Delta: 1 file changed, 48 insertions(+), 48 deletions(-)
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Cherry Mui (Gerrit)

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Keith Randall (Gerrit)

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    Keith Randall (Gerrit)

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    Keith Randall submitted the change

    Change information

    Commit message:
    sys/cpu: modify x86 port to match what internal/cpu does

    The way we call isSet is different in the two. Normalize x/sys
    to match internal/cpu.

    This was done using (mostly) gopls' quick fix, to ensure we
    don't miss any of the transpositions.
    Change-Id: I0b66152e194d46ed9299550e12641cc798f8b11b
    Reviewed-by: Cherry Mui <cher...@google.com>
    Reviewed-by: Keith Randall <k...@google.com>
    Files:
    • M cpu/cpu_x86.go
    Change size: M
    Delta: 1 file changed, 48 insertions(+), 48 deletions(-)
    Branch: refs/heads/master
    Submit Requirements:
    • requirement satisfiedCode-Review: +2 by Cherry Mui, +1 by Keith Randall
    • requirement satisfiedTryBots-Pass: LUCI-TryBot-Result+1 by Go LUCI
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    Gerrit-MessageType: merged
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    Gerrit-Branch: master
    Gerrit-Change-Id: I0b66152e194d46ed9299550e12641cc798f8b11b
    Gerrit-Change-Number: 731320
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