[go] cmd/internal/obj/loong64: improve ARNG type register name conversion

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abner chenc (Gerrit)

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3:11 AM (12 hours ago) 3:11 AM
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abner chenc has uploaded the change for review

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cmd/internal/obj/loong64: improve ARNG type register name conversion

When resolving ARNG type names, the base value was not subtracted
when calculating the variable simd_type, causing its actual value
to not match the expected meaning after the base value adjustment.

Fixes #77414
Change-Id: I713bab849ecdb5610d2593ba9bd9e1169842f00e

Change diff

diff --git a/src/cmd/asm/internal/arch/loong64.go b/src/cmd/asm/internal/arch/loong64.go
index 21263d3..e43aaf6 100644
--- a/src/cmd/asm/internal/arch/loong64.go
+++ b/src/cmd/asm/internal/arch/loong64.go
@@ -77,12 +77,15 @@
 	var ok bool
 	var arng_type int16
 	var simd_type int16
+	var simd_reg int16
 
 	switch {
 	case reg >= loong64.REG_V0 && reg <= loong64.REG_V31:
 		simd_type = loong64.LSX
+		simd_reg = reg - loong64.REG_V0
 	case reg >= loong64.REG_X0 && reg <= loong64.REG_X31:
 		simd_type = loong64.LASX
+		simd_reg = reg - loong64.REG_X0
 	default:
 		return errors.New("Loong64 extension: invalid LSX/LASX register: " + fmt.Sprintf("%d", reg))
 	}
@@ -94,7 +97,7 @@
 		}
 
 		a.Reg = loong64.REG_ELEM
-		a.Reg += ((reg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT)
+		a.Reg += ((simd_reg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT)
 		a.Reg += ((arng_type & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT)
 		a.Reg += ((simd_type & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT)
 		a.Index = num
@@ -114,7 +117,7 @@
 		}
 
 		a.Reg = loong64.REG_ARNG
-		a.Reg += ((reg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT)
+		a.Reg += ((simd_reg & loong64.EXT_REG_MASK) << loong64.EXT_REG_SHIFT)
 		a.Reg += ((arng_type & loong64.EXT_TYPE_MASK) << loong64.EXT_TYPE_SHIFT)
 		a.Reg += ((simd_type & loong64.EXT_SIMDTYPE_MASK) << loong64.EXT_SIMDTYPE_SHIFT)
 	}
diff --git a/src/cmd/internal/obj/loong64/list.go b/src/cmd/internal/obj/loong64/list.go
index dba8aab..4d1c751 100644
--- a/src/cmd/internal/obj/loong64/list.go
+++ b/src/cmd/internal/obj/loong64/list.go
@@ -10,52 +10,73 @@
 )
 
 func init() {
-	obj.RegisterRegister(obj.RBaseLOONG64, REG_LAST, rconv)
+	obj.RegisterRegister(obj.RBaseLOONG64, REG_LAST, RegName)
 	obj.RegisterOpcode(obj.ABaseLoong64, Anames)
 }
 
-func arrange(a int16) string {
-	switch a {
-	case ARNG_32B:
-		return "B32"
-	case ARNG_16H:
-		return "H16"
-	case ARNG_8W:
-		return "W8"
-	case ARNG_4V:
-		return "V4"
-	case ARNG_2Q:
-		return "Q2"
-	case ARNG_16B:
-		return "B16"
-	case ARNG_8H:
-		return "H8"
-	case ARNG_4W:
-		return "W4"
-	case ARNG_2V:
-		return "V2"
-	case ARNG_B:
-		return "B"
-	case ARNG_H:
-		return "H"
-	case ARNG_W:
-		return "W"
-	case ARNG_V:
-		return "V"
-	case ARNG_BU:
-		return "BU"
-	case ARNG_HU:
-		return "HU"
-	case ARNG_WU:
-		return "WU"
-	case ARNG_VU:
-		return "VU"
+func arrange(valid int16) string {
+	var reg_prefix string
+	var arng_name string
+
+	// bits 0-4 indicates register: Vn or Xn
+	// bits 5-9 indicates arrangement: <T>
+	// bits 10 indicates SMID type: 0: LSX, 1: LASX
+	simd_type := (valid >> EXT_SIMDTYPE_SHIFT) & EXT_SIMDTYPE_MASK
+	reg_num := (valid >> EXT_REG_SHIFT) & EXT_REG_MASK
+	arng_type := (valid >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK
+
+	switch simd_type {
+	case LSX:
+		reg_prefix = "V"
+	case LASX:
+		reg_prefix = "X"
 	default:
-		return "ARNG_???"
+		reg_prefix = "#"
 	}
+
+	switch arng_type {
+	case ARNG_32B:
+		arng_name = "B32"
+	case ARNG_16H:
+		arng_name = "H16"
+	case ARNG_8W:
+		arng_name = "W8"
+	case ARNG_4V:
+		arng_name = "V4"
+	case ARNG_2Q:
+		arng_name = "Q2"
+	case ARNG_16B:
+		arng_name = "B16"
+	case ARNG_8H:
+		arng_name = "H8"
+	case ARNG_4W:
+		arng_name = "W4"
+	case ARNG_2V:
+		arng_name = "V2"
+	case ARNG_B:
+		arng_name = "B"
+	case ARNG_H:
+		arng_name = "H"
+	case ARNG_W:
+		arng_name = "W"
+	case ARNG_V:
+		arng_name = "V"
+	case ARNG_BU:
+		arng_name = "BU"
+	case ARNG_HU:
+		arng_name = "HU"
+	case ARNG_WU:
+		arng_name = "WU"
+	case ARNG_VU:
+		arng_name = "VU"
+	default:
+		arng_name = "ARNG_???"
+	}
+
+	return fmt.Sprintf("%s%d.%s", reg_prefix, reg_num, arng_name)
 }
 
-func rconv(r int) string {
+func RegName(r int) string {
 	switch {
 	case r == 0:
 		return "NONE"
@@ -74,28 +95,10 @@
 		return fmt.Sprintf("V%d", r-REG_V0)
 	case REG_X0 <= r && r <= REG_X31:
 		return fmt.Sprintf("X%d", r-REG_X0)
-	}
-
-	// bits 0-4 indicates register: Vn or Xn
-	// bits 5-9 indicates arrangement: <T>
-	// bits 10 indicates SMID type: 0: LSX, 1: LASX
-	simd_type := (int16(r) >> EXT_SIMDTYPE_SHIFT) & EXT_SIMDTYPE_MASK
-	reg_num := (int16(r) >> EXT_REG_SHIFT) & EXT_REG_MASK
-	arng_type := (int16(r) >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK
-	reg_prefix := "#"
-	switch simd_type {
-	case LSX:
-		reg_prefix = "V"
-	case LASX:
-		reg_prefix = "X"
-	}
-
-	switch {
 	case REG_ARNG <= r && r < REG_ELEM:
-		return fmt.Sprintf("%s%d.%s", reg_prefix, reg_num, arrange(arng_type))
-
+		return arrange(int16(r - REG_ARNG))
 	case REG_ELEM <= r && r < REG_ELEM_END:
-		return fmt.Sprintf("%s%d.%s", reg_prefix, reg_num, arrange(arng_type))
+		return arrange(int16(r - REG_ELEM))
 	}
 
 	return fmt.Sprintf("badreg(%d)", r-obj.RBaseLOONG64)

Change information

Files:
  • M src/cmd/asm/internal/arch/loong64.go
  • M src/cmd/internal/obj/loong64/list.go
Change size: M
Delta: 2 files changed, 67 insertions(+), 61 deletions(-)
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abner chenc (Gerrit)

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3:22 AM (12 hours ago) 3:22 AM
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abner chenc voted Commit-Queue+1

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WANG Xuerui (Gerrit)

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6:45 AM (8 hours ago) 6:45 AM
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WANG Xuerui voted and added 1 comment

Votes added by WANG Xuerui

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File-level comment, Patchset 1 (Latest):
WANG Xuerui . resolved

LGTM but a further cleanup of the `under_score` variable names would be much appreciated (at least I haven't found any else in cmd/asm).

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