diff --git a/src/simd/internal/spec/converts.go b/src/simd/internal/spec/converts.go
index 7f24db7..16baea7 100644
--- a/src/simd/internal/spec/converts.go
+++ b/src/simd/internal/spec/converts.go
@@ -9,7 +9,7 @@
// ConvertToZ converts element values to {zE}. The result has the same number of lanes.
//
//specgen:name ConvertTo{zE}
-//specgen:require zL=xL zE!=xE
+//specgen:require z={zB}{zN}x{xL} zE!=xE
func ConvertToZ[xE Nums, xW Width, zE Nums, zW Width](x Vec[xE, xW]) (z Vec[zE, zW]) {
// Architectures are generally significantly more constrained in what they
// will convert between, but this operation describes the full universe of
diff --git a/src/simd/internal/spec/doc.go b/src/simd/internal/spec/doc.go
index 35b8675..1f6d137 100644
--- a/src/simd/internal/spec/doc.go
+++ b/src/simd/internal/spec/doc.go
@@ -104,6 +104,16 @@
// zB=vB zN=vN*2 zL=vL/2 Constrain each component separately
// zE={vB}{vN*2} zW=vW Constrain the element type and width separately
//
+// ### Width rounding
+//
+// Some operations would naturally result in an impossible vector size. For
+// example, converting a Float64x2 vector to float32s would naturally result in
+// Float32x2, which is only 64 bits and thus smaller than the smallest vector
+// size. For operations like this, we use "width rounding".
+//
+// Width rounding is applied specifically by the vector expression form BaseNxL.
+// If NxL would be < 128, the result rounds L up to 128/N.
+//
// ## Name and doc templates
//
// For some operations, the API name or documentation depends on type