[go/dev.simd] [dev.simd] cmd/compile: add masked merging ops
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Junyang Shao (Gerrit)
Nov 5, 2025, 2:25:46 PM (8 days ago) Nov 5
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Commit message
[dev.simd] cmd/compile: add masked merging ops
This CL only adds the ops, the rules to generate them will be in the
next CL.
Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179
Change diff
Change information
Files:
- M src/cmd/compile/internal/amd64/simdssa.go
- M src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
- M src/cmd/compile/internal/ssa/opGen.go
- M src/simd/_gen/simdgen/gen_simdMachineOps.go
- M src/simd/_gen/simdgen/gen_simdssa.go
Change size: XL
Delta: 5 files changed, 17359 insertions(+), 17 deletions(-)
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Junyang Shao (Gerrit)
Nov 5, 2025, 2:26:10 PM (8 days ago) Nov 5
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Junyang Shao (Gerrit)
Nov 5, 2025, 5:55:48 PM (7 days ago) Nov 5
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Junyang Shao (Gerrit)
Nov 9, 2025, 4:51:38 PM (4 days ago) Nov 9
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Junyang Shao (Gerrit)
Nov 10, 2025, 12:23:55 PM (3 days ago) Nov 10
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Junyang Shao uploaded patch set #4 to this change.
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Junyang Shao (Gerrit)
Nov 10, 2025, 12:40:11 PM (3 days ago) Nov 10
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Junyang Shao (Gerrit)
Nov 10, 2025, 12:48:00 PM (3 days ago) Nov 10
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Junyang Shao uploaded patch set #6 to this change.
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Junyang Shao (Gerrit)
Nov 10, 2025, 12:52:31 PM (3 days ago) Nov 10
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Junyang Shao (Gerrit)
Nov 10, 2025, 12:53:53 PM (3 days ago) Nov 10
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Junyang Shao (Gerrit)
Nov 10, 2025, 1:13:21 PM (3 days ago) Nov 10
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Junyang Shao uploaded patch set #8 to this change.
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Junyang Shao (Gerrit)
Nov 10, 2025, 1:13:36 PM (3 days ago) Nov 10
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David Chase (Gerrit)
Nov 10, 2025, 6:03:02 PM (2 days ago) Nov 10
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David Chase added 4 comments![]( "Open in Gerrit")
Patchset-level comments
File-level comment, Patchset 8 (Latest):
David Chase . resolved
+2, plus a question about something that looks maybe like a leftover from an earlier CL.
File src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
Line 248, Patchset 8 (Latest):
w2fpkw = regInfo{inputs: []regMask{w, wz, fp, mask}, outputs: wonly} // used in resultInArg0 ops, arg0 must not be x15David Chase . unresolved
See other remarks about "did we need this?"
File src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
Line 6, Patchset 8 (Latest):
wkwload, v21load, v31load, v11load, w21load, w31load, w2kload, w2kwload, w11load, w3kwload, w2kkload, v31x0AtIn2, w2fpkw regInfo) []opData {David Chase . unresolved
did we need to add this one? It looks like we use the pre-existing w3kw, maybe?
File src/simd/internal/simd_test/simd_test.go
Line 1119, Patchset 8 (Latest):
x.Add(y).Merge(x, mask).StoreSlice(res)
} else {
x.Add(y).Merge(x, mask).StoreSlice(res)David Chase . unresolved
I might want to add a "z" vector for the Merge, say {-1, -2, -3, -4} so that expected would be {6, 8, -3, -4}. That should work, right?'
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David Chase (Gerrit)
Nov 10, 2025, 6:03:14 PM (2 days ago) Nov 10
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| Code-Review | +2 |
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Junyang Shao (Gerrit)
Nov 11, 2025, 3:41:28 PM (2 days ago) Nov 11
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Junyang Shao uploaded new patchset![]( "Open in Gerrit")
Junyang Shao uploaded patch set #9 to this change.
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Junyang Shao (Gerrit)
Nov 11, 2025, 3:41:34 PM (2 days ago) Nov 11
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Junyang Shao voted and added 3 comments![]( "Open in Gerrit")
Votes added by Junyang Shao
| Commit-Queue | +1 |
3 comments
File src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
Line 248, Patchset 8:
w2fpkw = regInfo{inputs: []regMask{w, wz, fp, mask}, outputs: wonly} // used in resultInArg0 ops, arg0 must not be x15David Chase . resolved
See other remarks about "did we need this?"
Junyang Shao
Ohh yes, thank you for finding this, it is indeed stale change from previous PCs.
File src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
Line 6, Patchset 8:
wkwload, v21load, v31load, v11load, w21load, w31load, w2kload, w2kwload, w11load, w3kwload, w2kkload, v31x0AtIn2, w2fpkw regInfo) []opData {David Chase . resolved
did we need to add this one? It looks like we use the pre-existing w3kw, maybe?
Junyang Shao
Done
File src/simd/internal/simd_test/simd_test.go
Line 1119, Patchset 8:
x.Add(y).Merge(x, mask).StoreSlice(res)
} else {
x.Add(y).Merge(x, mask).StoreSlice(res)David Chase . resolved
I might want to add a "z" vector for the Merge, say {-1, -2, -3, -4} so that expected would be {6, 8, -3, -4}. That should work, right?'
Junyang Shao
Yes that works, updated.
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Junyang Shao (Gerrit)
Nov 11, 2025, 4:02:30 PM (2 days ago) Nov 11
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Junyang Shao voted and added 1 comment![]( "Open in Gerrit")
Votes added by Junyang Shao
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Junyang Shao (Gerrit)
Nov 11, 2025, 4:34:44 PM (2 days ago) Nov 11
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Junyang Shao submitted the change with unreviewed changes![]( "Open in Gerrit")
Unreviewed changes
8 is the latest approved patch-set.
The change was submitted with unreviewed changes in the following files:
```
The name of the file: src/simd/internal/simd_test/simd_test.go
Insertions: 4, Deletions: 3.
The diff is too large to show. Please review the diff.
```
```
The name of the file: src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
Insertions: 1, Deletions: 1.
The diff is too large to show. Please review the diff.
```
```
The name of the file: src/cmd/compile/internal/ssa/rewriteAMD64.go
Insertions: 5624, Deletions: 5624.
The diff is too large to show. Please review the diff.
```
```
The name of the file: src/simd/_gen/simdgen/gen_simdMachineOps.go
Insertions: 2, Deletions: 2.
The diff is too large to show. Please review the diff.
```
```
The name of the file: src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
Insertions: 403, Deletions: 403.
The diff is too large to show. Please review the diff.
```
```
The name of the file: src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
Insertions: 15, Deletions: 16.
The diff is too large to show. Please review the diff.
```
Change information
Commit message:
[dev.simd] cmd/compile: add masked merging ops and optimizations
This CL generates optimizations for masked variant of AVX512
instructions for patterns:
x.Op(y).Merge(z, mask) => OpMasked(z, x, y mask), where OpMasked is
resultInArg0.
Change-Id: Ife7ccc9ddbf76ae921a085bd6a42b965da9bc179
Reviewed-on: https://go-review.googlesource.com/c/go/+/718160
Reviewed-by: David Chase <drc...@google.com>
TryBot-Bypass: Junyang Shao <shaoj...@google.com>
Files:
- M src/cmd/compile/internal/amd64/simdssa.go
- M src/cmd/compile/internal/amd64/ssa.go
- M src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
- M src/cmd/compile/internal/ssa/_gen/simdAMD64.rules
- M src/cmd/compile/internal/ssa/_gen/simdAMD64ops.go
- M src/cmd/compile/internal/ssa/opGen.go
- M src/cmd/compile/internal/ssa/rewriteAMD64.go
- M src/simd/_gen/simdgen/gen_simdMachineOps.go
- M src/simd/_gen/simdgen/gen_simdTypes.go
- M src/simd/_gen/simdgen/gen_simdrules.go
- M src/simd/_gen/simdgen/gen_simdssa.go
- M src/simd/_gen/simdgen/gen_utility.go
- M src/simd/_gen/simdgen/ops/Moves/go.yaml
- M src/simd/internal/simd_test/simd_test.go
- M test/codegen/simd.go
Change size: XL
Delta: 15 files changed, 17367 insertions(+), 627 deletions(-)
Branch: refs/heads/dev.simd
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Code-Review: +2 by David Chase
TryBots-Pass: LUCI-TryBot-Result-1 by Go LUCI, TryBot-Bypass+1 by Junyang Shao
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