Unreviewed changes
2 is the latest approved patch-set.
The change was submitted with unreviewed changes in the following files:
```
The name of the file: src/simd/archsimd/shuffles_amd64.go
Insertions: 8, Deletions: 8.
@@ -1364,7 +1364,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX2
func (x Uint64x4) CarrylessMultiplyEven(y Uint64x4) Uint64x4 {
return x.carrylessMultiply(0, y)
}
@@ -1382,7 +1382,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX2
func (x Uint64x4) CarrylessMultiplyOdd(y Uint64x4) Uint64x4 {
return x.carrylessMultiply(0b10001, y)
}
@@ -1400,7 +1400,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX2
func (x Uint64x4) CarrylessMultiplyOddEven(y Uint64x4) Uint64x4 {
return x.carrylessMultiply(0b1, y)
}
@@ -1418,7 +1418,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX2
func (x Uint64x4) CarrylessMultiplyEvenOdd(y Uint64x4) Uint64x4 {
return x.carrylessMultiply(0b10000, y)
}
@@ -1436,7 +1436,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX512VPCLMULQDQ
func (x Uint64x8) CarrylessMultiplyEven(y Uint64x8) Uint64x8 {
return x.carrylessMultiply(0, y)
}
@@ -1454,7 +1454,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX512VPCLMULQDQ
func (x Uint64x8) CarrylessMultiplyOdd(y Uint64x8) Uint64x8 {
return x.carrylessMultiply(0b10001, y)
}
@@ -1472,7 +1472,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX512VPCLMULQDQ
func (x Uint64x8) CarrylessMultiplyOddEven(y Uint64x8) Uint64x8 {
return x.carrylessMultiply(0b1, y)
}
@@ -1490,7 +1490,7 @@
// x**2 + 0x + 1 = x**2 + 1 modeled by 101. (Note that "+" adds
// polynomial terms, but coefficients "add" with XOR.)
//
-// Asm: VPCLMULQDQ, CPU Feature: AVX
+// Asm: VPCLMULQDQ, CPU Feature: AVX512VPCLMULQDQ
func (x Uint64x8) CarrylessMultiplyEvenOdd(y Uint64x8) Uint64x8 {
return x.carrylessMultiply(0b10000, y)
}
```
Change information
Commit message:
[dev.simd] simd: rename CarrylessMultiply
This CL does this: Drop a and b control arguments (clearly non-portable). Replace with CarrylessMultiply(Even|EvenOdd|OddEven|Odd), Conveniently, this naming convention merges the behavior of CarrylessMultiply and CarrylessMultiplyGrouped so we don't need the separate "grouped" version.
For #78979.
Change-Id: Ib08cdf49f5c2ec01d550ed9f89d7d3b7193461f6
Files:
- M src/simd/archsimd/internal/simd_test/simd_test.go
- M src/simd/archsimd/shuffles_amd64.go
Change size: M
Delta: 2 files changed, 179 insertions(+), 38 deletions(-)
Branch: refs/heads/dev.simd