Change information
Commit message:
[dev.simd] cmd/compile: make X/Y/Z16-31 allocatable
This CL makes X/Y/Z16-31 allocatable, so they can be used for
512-bit SIMD operations. They are in special registers so they are
only allocated if the operation's register mask includes it.
Move to/from high registers requires VMOVDQU8/16/32/64
instructions instead of plain VMOVDQU. Change the load/store/copy
routines to use that (we don't do masking there so VMOVDQU64 is
fine).
Currently, for 128- and 256-bit SIMD operations, still only the
low registers are allocated. If we know AVX512 is available (e.g.
with a feature check or GOAMD64=v4), we could use high registers
for them. That will be a later CL.
Fixes #78753.
Change-Id: I5193e20907bc3644b8e6e2116973a3f433f88889
Files:
- M src/cmd/compile/internal/amd64/ssa.go
- M src/cmd/compile/internal/ssa/_gen/AMD64Ops.go
- M src/cmd/compile/internal/ssa/opGen.go
- M src/simd/archsimd/internal/simd_test/simd_test.go
Change size: M
Delta: 4 files changed, 103 insertions(+), 47 deletions(-)
Branch: refs/heads/dev.simd