Hola Juan
Thanks a lot for this detailed explanation, i started, this weekend, and will continue learning about Forth, and try following your findings!
I also encourage you to go deeper into that proof of concept ! Something interesting can come out of any research/exploration path ! You are one of the Jacques Yves Cousteau of the fpga world ;-)
if you end up with something nice, than we will need a plugin where we just enter the forth code (text) and it automatically places all the needed forth blocks with their wiring !
This idea of "converting" soft code to hardware is interesting, we can imagine doing it for plainty of other codes (C,Faust, ...)
Looking on the internet about the subject, it pointed me back to High-level synthesis (HLS) concept. This tools have different levels of optimisation (ressources wise)
But no one have done something for Forth! The reason may be (as you wrote) that forth words/instructions are not all fully predefined/standardized (this additional definition being made by the Forth coding user).
About the beginners knowing/learning hdl code, it seams to me that in a close future, we should count on AI help as much as someone working with mathematics is using a calculator!
From the test i did, i can conclude that those AI are already very good at Verilog!
I bet that we will have in less than 2 years an AI plugin in icestudio ;-). To helps us generate verilog code and to convert the verilog code directly to an icestudio block
Soon, people will just learn "speaking" to their AI and they will be able to generate their code in every possible language.
This week i installed Opera on my android phone and it includes the Aira Ai(which is also powered by Chatgpt) and i have a free brain assistant with me every were i go ! i will never be alone any-more :-)
Sorry for that off topic end of message ;-)