Dual BRAM Fifo

[Rob Holmes]

HI All,

I was wondering if anyone had any thoughts on if this is going to be possible or not.

I have a FiFO mapped to a 4k BRAM block which "seems" to be working correctly.

However i need a slightly bigger fifo to use as a line buffer so i was thinking the following. (see image) using multiple BRAMs together to make 1 larger fifo. 

However am i right in thinking its never going to let me share the output (rdata) between both BRAM blocks? 

[Jesus Arias]

Hi,

To connect several BRAMs is OK, but you must be aware the SB_RAM40_4K blocks are specific for the Lattice FPGAs, so, I think it would be better to use a generic memory description and to left the synthesis tool to do the actual BRAM mapping, something like:

...

reg [15:0]memory[0:8191];

initial readmemh("initialdata.hex",memory);

reg [15:0]rdata;

always @(posedge rclk) if (re) rdata<=memory[raddr];

always @(posedge wclk) if (we) memory[waddr]<=wdata;

...

[Rob Holmes]

Thanks for the reply, however if i use generic memory the synthesis tool never seems to infer BRAM, this was the only way i could get the following to show up was to use the primitive (screenshot)..... ill try again.

So if the synthesis tool does what it should i can define an 8k memory block and it will just automatically split it between 2 4k bram instalces? if so that will be awesome!

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[Rob Holmes]

Ignore me, i was probably doing something wrong.... It worked this time. I have a feeling that the BRAM isnt inferred until you actually wire the output somewhere.... which meant i was giving up one step before it got inferred thinking i was doing it wrong!

reg [15:0] memory [0:511];

gives me this :)




THankyou again for you help and sorry for the mundane questions :)

Rob.

[charli va]

Hi Rob!! There are no mundane questions!

All learn a lot of each thread of this forum.

Thanks a lot for share your questions, and maintain us informed about your projects!

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[Jesus Arias]

Oh, yes. Yosys does a pretty good job removing all the logic if signals are left unconnected ;)

So, be sure your signals are at least routed to some physical pins before looking at the LC & BRAM counts.

Have a nice day