Asynchronous FIFO design

[charli va]

An interesting document , i hope you enjoi it!

http://www.sunburst-design.com/papers/CummingsSNUG2002SJ_FIFO1.pdf

[Jesus Arias]

Hi,

That was an interesting paper, indeed. The use of gray code counters, that only change a single bit when incrementing or decrementing, highlights the big problem combinational glitches are in the field of async memories. But, for our BRAM blocks we have no worries because the buffer-full flag, and everything else, are only valid on the rising edges of the clock, some time after these transients faded away.

Good nigh