Design resource usage and H/W 8b/10b encoder status

[Mike Field]

I've got hardware 8B/10B encoding sort of working - it looks right in simulation but doesn't work on the hardware. However it works enough that I can measure the impact of moving the 8b/10b into the transceiver, and the answer is about 170 slices per pair of channels - as two channels can share the same lookup ROM)

It is also interesting that a config for four channels is only 30% bigger than that required for a single channel. A four lane H/W assisted interface is smaller than a single lane using my soft encoder.

Mike

Single lane enabled, Spartan 6 LXT

 Ch | 8b/10b |  Regs | LUTs | Slices | BRAM

----+--------+-------+------+--------+------

  1 |  SW    |   649 |  966 |    366 | 2

  1 |  HW    |   606 |  822 |    290 | 2

All four lanes enabled, Spartan 6 LXT

 Ch | 8b/10b |  Regs | LUTs | Slices | BRAM

----+--------+-------+------+--------+------

  1 |  SW    |   890 | 1437 |    654 | 2

  1 |  HW    |   646 |  924 |    326 | 2

  4 |  SW    |  1062 | 1600 |    697 | 2

  4 |  HW    |   818 | 1086 |    380 | 2

[Tim Ansell]

For that 50% reduction in the number of slices, it seems like it is worth figuring it out the hardware path?

From a learning exercise, it is definitely good to have the software version too :-)

Tim 'mithro' Ansell

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[Mike Field]

This has been actioned, and now both Artix-7 and Spartan 6 have examples that support h/w 8b/10b coding.

Mike

[Tim Ansell]

Thanks for all your hard work on this Mike!

Tim 'mithro' Ansell

On 27 Oct 2015 5:49 p.m., "Mike Field" <ham...@snap.net.nz> wrote:

This has been actioned, and now both Artix-7 and Spartan 6 have examples that support h/w 8b/10b coding.

Mike

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[Tim Ansell]

Out of interest how does the Spartan-6 design compare to the Artix-7 design in "resource usage"?

Tim

[Mike Field]

With H/W 8b/10b = 320 slices, two of RAMB8BWER blocks

With soft  8b/10b = 562 slices, two of RAMB8BWER blocks

So almost half the size 40% smaller....

Mike

[Tim Ansell]

I was more wondering Spartan-6 verse Artix-7.

How much were you able to share much between the two implementations? I assume pretty much everything apart from the GTP configuration bits should be common?

Do you have time to do a short write up on the differences / similarities between the high speed transceivers on both architectures from implementing the DisplayPort core point of view?

Tim 'mithro' Ansell

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