SPI and I2C voltages

[CamNut]

The Lepton module shows that it's I/O power supply input should be ~2.8v.  Since the SPI and I2C bus should also be the same voltage, how does this work directly with something like a RPi 2 where it's bus voltages are 3.3v?  There is no level converter on the breakout boards that I have seen.  It seems that this is a bit dangerous.  Shouldn't there be level shifters to handle the SPI and I2C bus voltages when they are not the same as the Lepton's I/O voltage?

[Marty Falatic]

That's an interesting question! Looking at the full datasheet, the Lepton's VDDIO is nominally 2.5-3.1V, but has an absolute maximum of 4.8V. I'd suspect that 3.3V isn't far enough out of spec to matter (< 7%), and is well below the absolute max. I can't say for sure though... a level shifter might not be a bad idea though I've not seen a lot of blown-out Leptons in the threads here.

FWIW I personally prefer the Thermal 1 board - it avoids that problem and it doesn't require the host to have perfect timing (the Lepton itself is ridiculously finicky and I could never get it to stay stable with the Pi (probably due to timing variations caused by task switching and system interrupts)). However, you can't go as low-level with the Lepton then either - except by reprogramming the MCU on the Thermal 1. But in general, offloading processing to a dedicated processor capable of servicing the Lepton in realtime seems to be the way to go (with whatever level shifting is appropriate).

[don felipe]

I've suspected the I2C communication to be the cause of some of the lockup issues people experience with the Lepton. I eliminated the issue when I dedicated the MCU to only receiving frames over the SPI bus. It is a hardware shutdown mode that requires an actual power cycle, and not just re-establishment of communication. Your questions prompted me to compare the PureEngineering Breakout board schematic. Seeing as there is no BOM(what's with that?) it isn't super helpful. It also seems to ignore the Lepton datasheet more than what you mention.
A supply voltage at 3.3V should be fine because it seems to be regulated, 2.8V at (VDDIO and VDDC) and 1.2v at VDDC(measured open circuit). I couldn't say how clean these are as I have no way of measuring them at the moment. There is no level shifting on the I2C or SPI lines for some reason. The lepton is going to be driving the MISO line, and CS is active low, so a voltage issue might not occur there. MOSI should be grounded as the per the description of the VoSPI physical interface description. The SDL and SCL lines I measured 2.86V from 3.3V at (MCU in my case, or Pi if you are using that). These lines are pulled up to the VDDIO, which is regulated at 2.8V(I believe). So some current is being used somewhere, and I strongly think that this is causing the Lepton to shut down. I believe CamNut mentioned something about temperature fluctuations without level shifting in a separate post. I definitely could be off-base, but this seems to be a better than "Lepton just randomly locks up and has to be powered down." In any event it is a curious thing that level shifters were not included in the breakout board.

[sa...@pureengineering.com]

The lepton i2c are actually not fully upto the i2c spec. They are not purely open-collector as they should be. So any voltages above 2.8V go into lepton.  The best solution would be to run the i2c with pull-ups to 2.8V only. or use some level shifting IC. 

For a robust production application, I would recommend level shifters between all the lines. but for experimentation and testing of the lepton, I have found the voltage differences not to be a problem. The breakout goal is to just expose the raw lepton lepton lines to a more practical 100mil header to develop a custom application around. 

The 2.8V regulators are the ultra low noise FT533GA. 

and the digital core of 1.2V is the AAT1146IJS-1.2-T1.   low noise is really only critical on the analog 2.8V.  

Heat generated from a 1.2V LDO would cause issues with the lepton maintaining calibration. and why a 1.2V switcher is recommended. (if using a 1.2V ldo it needs to be placed far away from the lepton so heat does not go into the lepton)

One last note. the pure thermal 1 board digital core is at 3.0V and analog is 2.8V. this makes interfacing with 3.0 logic simpler. note that the max the lepton digital can run at is 3.1V so running at 3.3V is not viable. 

[Marty Falatic]

On Friday, January 29, 2016 at 8:13:33 AM UTC-8, sa...@pureengineering.com wrote:

One last note. the pure thermal 1 board digital core is at 3.0V and analog is 2.8V. this makes interfacing with 3.0 logic simpler. note that the max the lepton digital can run at is 3.1V so running at 3.3V is not viable. 

Thank for the detailed reply!

Just so I understand, is the Thermal 1 safe to interface to at 3.3V via its UART/I2C pinouts? (It's not clear if you mean the core requires a 3.0V supply or if the I/O must stay within that as well). 

[sa...@pureengineering.com]

The I/O voltage for the pure thermal 1 is 3.0V. For interfacing to most 3.3V logic there shouldn't be an issue as the difference of .3V typically falls within the acceptable tolerance of most parts. Of course each IC has different specs so its worth double checking.
Also note that there is 3.0V output that could be used to power some interface logic or microcontroller as well, it was designed to tolerate a esp8266 to give you a general idea of what could run from it.