Seeking Help with FLIR Lepton 3.5 using RA6M3

[Vishnu Kumar]

Hi All,

I hope this message finds you well. I am currently working with the FLIR Lepton 3.5 and facing some challenges related to VoSPI, Vsync, and Invalid Packet issues. I would greatly appreciate any insights, suggestions, or solutions from the community to resolve these issues.

My Setup:

• Hardware: RA6M3 100 pin
• FLIR Lepton Model: Lepton 3.5
• Interface: Simple SPI (VoSPI mode)
• Tool: e2studio + Azure RTOS

Issues Faced:

1. VoSPI Configuration:

   • I am experiencing difficulties with the VoSPI (Video over SPI) interface. The communication seems unstable, and I am unsure if my configuration is correct.
   • Are there any recommended settings or best practices for VoSPI to ensure stable communication?

2. Vsync Problems:

   • The Vsync signal appears to be inconsistent, leading to frame synchronization issues.
   • Has anyone encountered similar problems? How did you resolve them?

3. Invalid Packet Errors:

   • I am receiving "Invalid Packet" errors during data transmission. This is causing dropped frames and unreliable data.
   • Could this be related to timing, SPI clock speed, or something else?

Questions:

• Are there any known issues or fixes for VoSPI, Vsync, and Invalid Packet errors?
• Could someone share their working configuration or code snippets for VoSPI and Vsync handling?
• Are there any debugging tips or tools to diagnose these issues?

Thanks in advance!

Regards, 

Vishnukumar D

[Dan Julio]

Vsync works.  The main thing is that you have to keep up with VoSPI.  It is essentially sending around 30 FPS worth of packets (plus discard packets).  If you fall behind reading them then the VoSPI interface will need resynchronization and will be unable to deliver data.  You mention using Azure RTOS.  Make sure whatever task/thread is reading the Lepton gets sufficient time.  You don't mention your SPI details.  Typically the Lepton can be read successfully with a 16 MHz SPI clock.  It's easiest if you can use DMA to read complete packets instead of trying to have the MPU directly manage SPI transactions.  That way you can process one packet while retrieving the next.

You can look at my code for an example of using Vsync: https://github.com/danjulio/tCam/blob/main/tCam-Mini/firmware/components/lepton/vospi.c

[Vishnu Kumar]

Thanks for the Response it's very helpful. 

I'm using RA6M3, 
There are no options to configure DMA for SPI communication. 

I tried with 16 MHz SPI bit rate, still receiving Invalid Video Lines. 

Let me know the Master Clock usage, 

We are giving the 25 MHz clock to Master CLK pin always. External clock source. I'm not controlling through MCU.

Regards, 

Vishnukumar D