The concept of clocking in Firesim

[Muhammad Ali Akhtar]

I know there has been numerous discussions on this topic by firesim developers but I am still confused about it. 

When we run a single node no network config, a single Rocket-Chip now running on a single FPGA. 
How do we determine the clock frequency at which Rocket-Chip is running?
I know there is FPGA clock at which FPGA design is synthesized and this clock is like 100 MHz. 

If the FPGA design has been implemented at and is running at 100 MHz, How do we conclude that Rocket-Chip is running at 3.2 GHz?

Muhammad Ali Akhtar

[David Biancolin]

Perhaps a better way to think about this is to analogize FireSim with a software RTL simulator. Verilator simulates target cycles at say 1s to 100 KHz, but by defining the period of the simulated clocks (using delays in verilog) it's capable of simulating a 3.2 GHz machine. 

The same is true in FireSim, just in a much more limited way. The clock bridge drive pulses into each simulated clock according to some predefined, rational set of clock ratios. The exact period (in seconds) is never defined (at least, on FireSim master), but their relative frequencies conform to those ratios. 

So ultimately, it's the target software distribution (i.e, Linux) that realizes an actual simulated period (in seconds), by way of the Device Tree, which indicates that the RTC toggles at some specific rate. All FireSim does is ensure the toggling of the RTC related clocks is correct relative to other clocks in the system. 

Chapter 5 of my dissertation has some treatment of the basics here: https://davidbiancolin.github.io/papers/dissertation.pdf