I really enjoy the PhoenixDiff website for seeing changes between Phoenix versions. It makes it much easier to upgrade an existing application. This got me thinking: it might be cool to have a similar interface for comparing projects generated with different generators and flag combinations.
So i've written a couple random number generators for a project that relies on generating normally distributed random numbers. I have written a couple of different implementations of the generator - namely Box-Muller method, Marsaglia's Polar method and the Inverse cumulative distribution approximation method. I've compared them in terms of speed and it turns out Inverse method is the fastest of the 3, is this expected, or did I mess up while writing the other two? I know numpy used the Polar method for a long time, so i believe it should be the fastest of the 3?
First of all, the implementation of rand is often pretty slow and using a slow division by RAND_MAX with a float cast is not going to help either. As a result, it is not surprising that the gauss and gaussbm implementations (which call at least rand twice) are actually slower than gaussInv (which call rand once).
Moreover, gauss is slow also because of the bad predictability of the while loop (processors are often faster on predictable loops and conditionals), and gaussbm is slow also because of the expensive cos/sin trigonometric function.
While gaussInv should be faster than the two others, it can be still improved. One way it to use vectorization and a custom optimized random function. Indeed, most processors can work on many floating-point at a time thanks to SIMD instruction and this function can makes use of them (although this is not straightforward). Most mainstream x86-64 processors can work on 8 floats in a row (using AVX/AVX2) and few recent processors can even compute up to 16 floats in a row (using AVX-512). Note that gaussbm could be vectorized too.
For scalar implementations, lookup tables can be used to speed up the computation although the throughput of the fastest scalar implementation will likely be significantly less than the one of any optimized vectorised implementation on modern mainstream processors.
At that point, you might ask yourself if it is really worth it to use lazy generators for the application at hand -- it might be better to simply convert them to lists and work with the lists instead.
Because generators generate their values on-demand, there isn't any way to "compare" them without actually consuming them. And if your generators generate an infinite sequence of values, such an equality test as you propose would be useless.
The list-based solution still fails when either generator generates an infinite number of elements. You can devise a workaround for that, but when both generators are infinite, you can only devise a semi-algorithm for non-equality.
In order to do an item-wise comparison of two generators as with lists and other containers, Python would have to consume them both entirely (well, the shorter one, anyway). I think it's good that you must do this explicitly, especially since one or the other may be infinite.
my Problem is the following: I want to change the compare value of three pwm generators of one module before every count cycle of the pwm. If I do this in the pwm count to zero Interrupt, it takes a short time to change the output signal. During this time the old values are on the outputs. Does anybody know how I can change the compare values otherwise?
Assume that you set up a count down operation, You can setup the PWM pin to go low when counter reaches zero and to go high when counter reaches the comapare value. In this way, the load register controls the period and the compare register controls the duty cycle (high time). In you application, you can update those registers as your wish. The updated value will be loaded into timer when the counter reaches zero. Due to the asynchronous operation between CPU and timer, I would suggest to update load register before the compare register to avoid glitch.
I believe this high a frequency of PWM update to be extremely unusual - especially so if the PWM frequency is at/beyond 8KHz. Now our group has long employed MCUs from here (and elsewhere) to control BLDC motors - and we perform classic, "Cycle by cycle" current-limiting. Yet - we never seek to change the PWM duty cycle at our (20KHz) PWM rate!
In terms of motors, power actuators - we find that duty cycle response is more than adequate via 1mS update rates. The natural mechanical inertia of such systems over-rides/dominates most any faster update rate. And - @ 20KHz there is just 50uS available to perform the needed calculations and any/all other required MCU/signal, "housekeeping."
For the most robust operation - should you really need to vastly increase duty cycle update - I'd confine such updates to no more than every 5 or 10 PWM cycles. (note that our/others "standard" 1mS rate is 20 such, 20KHz PWM Cycles...)
congratulations, you are right, my mother tongue is not english. If this disturbs you, please do not answer my questions and please do not write about 500 lines about how good ist Google translator. It does not care. Have you got all of your community Points like this?
Thomas Barth said:congratulations, you are right, my mother tongue is not english. If this disturbs you, please do not answer my questions and please do not write about 500 lines about how good ist Google translator. It does not care. Have you got all of your community Points like this?
Thomas forgot that and read between lines, I am not mother tongue too and was directed to CB1, I am sure my language is not so clean too and mother taste still remain interspersed, CB1 text sometime is too complex and require me and I suppose a lot of native learn about non common use of, google is not able to generally translate to a readable form from to English nor backward, some progress from little language went to light but don't expect use it more than as a simple dictionary... Anyway I am sure Goggle Translate is not able to translate this as you are doing I think yourself.
So I am able to somewhere read error injected from other languages, you are not one without knowledge so taste error to expression is not so important, please let me concentrate on what is your trouble:
From one pulse to the next is one pwm Periode. My aim is it to invert the pwm output in each periode and if i do this I get pulses before every inversion. I think this is because it took to long to invert the output.
Thomas Barth said:From one pulse to the next is one pwm Periode. My aim is it to invert the pwm output in each periode and if i do this I get pulses before every inversion. I think this is because it took to long to invert the output.
Hi, from your scope image I suppose it is an analog one, positive spike appear less thick as negative one, is your code acting different on positive or negative update? If scope is digital changing sampling rate image change due to aliasing or spikes are of different width?
A comparison-based digital waveform generator has been developed that directly enables purely duty cycle controlled digital mass filters. This waveform generator operates by the comparison of a periodic waveform and a DC level to produce a digital waveform. The improved duty cycle realized by this method of waveform generation is demonstrated by producing a mass spectrum of electrosprayed lysozyme by varying the duty cycle of a digital waveform applied to a quadrupole rod set. Operation and control of the waveform generator using an inexpensive open-source microcontroller is discussed.
Low voltage waveforms that drive digitally operated ion traps and guides are normally produced by counting the edges of a comparatively fast master clock. The literature provides examples of low voltage waveform generation based on this method of clock edge counting.6,10,13 This method works as illustrated in Fig. 1 where the input master clock (MCLK) edges are counted to determine the characteristics of output waveforms (A and B). The MCLK can be of either a fixed or variable frequency when generated by direct digital synthesis (DDS). It is possible to change the input MCLK frequency in as little as a microsecond at the cost of considerable complexity.13 This provides precise control of the waveform frequency, but the input MCLK cannot be changed fast enough to provide duty cycle control by switching the MCLK for each output waveform in the high or low output state for typical operating frequencies of up to 1 MHz.6 The novel method of digital waveform generation discussed here is in response to this limited rate of change in order to approach the 10 ppm duty cycle resolution required to produce a mass filter exhibiting a commercial grade resolving power.1
A timing diagram showing the generation of a waveform pair at 40% duty cycle. Output waveforms A and B are produced by counting the master clock (MCLK) rising edges. Output waveforms A and B are in the low state for four MCLK edges and in the high state for six MCLK edges. Once the output waveform period of 10 edges is counted, the counters will reset.
A method of waveform comparison to produce low voltage digital waveforms is introduced and used to operate the first purely duty cycle-based digital quadrupole mass filter. This method of waveform generation combines the frequency resolution of DDS with the duty cycle resolution afforded by the comparison in order to provide precise control of both the frequency and the duty cycle. A static DC level is compared to a periodic waveform (e.g., sine, triangle) to produce an output waveform, as described in Fig. 2. The duty cycle resolution achieved by this method will be limited by the precision of the periodic waveform and DC reference sources in addition to the precision of the comparison and will be discussed in greater detail. The already vast capabilities of digital waveform technology accessible by waveform manipulation alone which include ion trapping, ion isolation, and ion fragmentation can now be extended to mass filter operation.
7fc3f7cf58