I didn't see any real breaks, but did see some devices with the bit enabled
Signed-off-by: Shaohua Li <shaoh...@intel.com>
Index: linux/drivers/pci/probe.c
===================================================================
--- linux.orig/drivers/pci/probe.c 2007-09-06 13:18:07.000000000 +0800
+++ linux/drivers/pci/probe.c 2007-09-06 13:21:30.000000000 +0800
@@ -694,6 +694,19 @@ static void pci_read_irq(struct pci_dev
#define LEGACY_IO_RESOURCE (IORESOURCE_IO | IORESOURCE_PCI_FIXED)
+static void pcie_setup_device(struct pci_dev *dev)
+{
+ u16 reg16;
+ int pos;
+
+ pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
+ if (pos) {
+ pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, ®16);
+ reg16 &= ~PCI_EXP_DEVCTL_NOSNOOP_EN;
+ pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, reg16);
+ }
+}
+
/**
* pci_setup_device - fill in class and map information of a device
* @dev: the device structure to fill
@@ -795,6 +808,7 @@ static int pci_setup_device(struct pci_d
dev->class = PCI_CLASS_NOT_DEFINED;
}
+ pcie_setup_device(dev);
/* We found a fine healthy device, go go go... */
return 0;
}
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I'm not sure your analysis is correct. Here's what my draft copy of
the pcie 2.0 spec says:
Enble No Snoop If this bit is Set, the Function is permitted to
Set the No Snoop bit in the Requester Attributes of transactions it
initiates that do not require hardware enforced cache coherency (see
Section 2.2.6.5). Note that setting this bit to 1b should not cause
a Function to Set the No Snoop attribute on all transactions that it
initiates. Even when this bit is Set, a Function is only permitted
to Set the No Snoop attribute on a transaction when it can guarantee
that the address of the transaction is not stored in any cache in
the system. This bit permitted to be hardwired to 0b if a Function
would never Set the No Snoop attribute in transactions it initiates.
Default value of this bit is 1b.
That implies that devices are only allowed to set it when it's safe to
do so ... and we don't need to turn it off.
--
Intel are signing my paycheques ... these opinions are still mine
"Bill, look, we understand that you're interested in selling us this
operating system, but compare it to ours. We can't possibly take such
a retrograde step."
> I'm not sure your analysis is correct. Here's what my draft copy of
> the pcie 2.0 spec says:
>
> Enble No Snoop If this bit is Set, the Function is permitted to
> Set the No Snoop bit in the Requester Attributes of transactions it
> initiates that do not require hardware enforced cache coherency (see
> Section 2.2.6.5). Note that setting this bit to 1b should not cause
> a Function to Set the No Snoop attribute on all transactions that it
> initiates. Even when this bit is Set, a Function is only permitted
> to Set the No Snoop attribute on a transaction when it can guarantee
> that the address of the transaction is not stored in any cache in
> the system. This bit permitted to be hardwired to 0b if a Function
> would never Set the No Snoop attribute in transactions it initiates.
> Default value of this bit is 1b.
>
> That implies that devices are only allowed to set it when it's safe to
> do so ... and we don't need to turn it off.
This is my understanding of this area of PCI-E as well, and I
also agree that therefore we should not turn this bit off.
Thanks,
Shaohua
I agree. But Shaohua, do you see any problems that this patch fixes?
thanks,
greg k-h
Hm, well, if you don't mind, I'd like to leave it as is for now, as no
one is reporting any problems with this, and there seems to be some
disagreement as to if it is really needed or not.
Is that ok?
thanks,
greg k-h
Regards,
Shaohua