Please teach me X86 I/O port 0x61
tanaka
I investigate about NMI kernel messages.
Linux kernel read 0x61 address using inb(61h).
I search a amd opteron cpu following manuals.
but I do not find explanation of 0x61 address.
Could you teach me a 0x61 address of X86 arch >
Best regards.
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Randy Dunlap
> Dear all.
>
> I investigate about NMI kernel messages.
> Linux kernel read 0x61 address using inb(61h).
>
> I search a amd opteron cpu following manuals.
> but I do not find explanation of 0x61 address.
>
> http://support.amd.com/us/psearch/Pages/psearch.aspx?type=2.1&product=2.1.4&contentType=Tech+Doc+Processor&ostype=&keywords=&items=20
>
> Could you teach me a 0x61 address of X86 arch >
Hi,
IO port 0x61 (NMI Status & Control register) is not CPU-specific on x86.
It's more of a platform thing.
Intel describes it in ICH (chipset) specs, e.g., ICH7 spec,
section 10.7.1. Please try that and see if it answers your questions.
---
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
tanaka
I appreciate your responses.
We use AMD CPU machine.
For example,
http://www.sun.com/servers/entry/x4100/arch-wp.pdf
In Figure 1-1 block diagram (page 10) ,
which device is mapped 0x61 address in ?
--- Randy Dunlap <randy....@oracle.com> wrote:
> On Fri, 16 Jul 2010 00:00:36 +0900 (JST) tanaka wrote:
>
> > Dear all.
> >
> > I investigate about NMI kernel messages.
> > Linux kernel read 0x61 address using inb(61h).
> >
> > I search a amd opteron cpu following manuals.
> > but I do not find explanation of 0x61 address.
> >
> >
>
http://support.amd.com/us/psearch/Pages/psearch.aspx?type=2.1&product=2.1.4&contentType=Tech+Doc+Processor&ostype=&keywords=&items=20
> >
> > Could you teach me a 0x61 address of X86 arch >
>
> Hi,
>
> IO port 0x61 (NMI Status & Control register) is not CPU-specific on
> x86.
> It's more of a platform thing.
>
> Intel describes it in ICH (chipset) specs, e.g., ICH7 spec,
> section 10.7.1. Please try that and see if it answers your
> questions.
>
> ---
> ~Randy
> *** Remember to use Documentation/SubmitChecklist when testing your
> code ***
> --
--------------------------------------
Get the new Internet Explorer 8 optimized for Yahoo! JAPAN
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Randy Dunlap
> Good evening. Dear all.
>
> I appreciate your responses.
> We use AMD CPU machine.
>
> For example,
> http://www.sun.com/servers/entry/x4100/arch-wp.pdf
>
> In Figure 1-1 block diagram (page 10) ,
> which device is mapped 0x61 address in ?
I can't tell from that block diagram. I tried to see if 0x61 is part of
the AMD-8111 chipset, but it seems that they have removed all downloads
from that web page
(http://www.amd.com/us/products/embedded/chipsets/Pages/other-embedded-chipset-products.aspx,
last 3 links are bad).
I would expect 0x61 to be part of the 8111 or possibly 8132 chipset.
> --- Randy Dunlap <randy....@oracle.com> wrote:
>
>> On Fri, 16 Jul 2010 00:00:36 +0900 (JST) tanaka wrote:
>>
>>> Dear all.
>>>
>>> I investigate about NMI kernel messages.
>>> Linux kernel read 0x61 address using inb(61h).
>>>
>>> I search a amd opteron cpu following manuals.
>>> but I do not find explanation of 0x61 address.
>>>
>>>
>>
> http://support.amd.com/us/psearch/Pages/psearch.aspx?type=2.1&product=2.1.4&contentType=Tech+Doc+Processor&ostype=&keywords=&items=20
>>>
>>> Could you teach me a 0x61 address of X86 arch >
>>
>> Hi,
>>
>> IO port 0x61 (NMI Status & Control register) is not CPU-specific on
>> x86.
>> It's more of a platform thing.
>>
>> Intel describes it in ICH (chipset) specs, e.g., ICH7 spec,
>> section 10.7.1. Please try that and see if it answers your
>> questions.
>>
>> ---
--
~Randy
*** Remember to use Documentation/SubmitChecklist when testing your code ***
--