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Cache Occ AvgMemLat MemAccesses MissRate ( RD , WR, BUS) Dyn_Pow (mW) Lkg_Pow (mW)
IL1(0) 0.0 2.1 3853085 0.03% (100.0%, 0.0%, 0.0%) 59 0
ITLB(0) 0.0 2.1 3852809 0.01% (100.0%, 0.0%, 0.0%) 0 0
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DL1(0) 0.0 10.7 1600359 4.31% ( 97.4%, 92.0%, 0.0%) 59 0
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L2(0) 0.0 86.2 73856 88%.52 ( 10.3%, 0.0%, 0.0%) 0 77
L3(0) 0.0 67.8 71927 69.52% ( 30.5%, 0.0%, 0.0%) 0 355
MemBus(0) 0.0 107.5 21650 0.00% (100.0%, 0.0%, 0.0%) 0 8
PTLB(0) 0.0 11.1 1599881 6.34% ( 93.7%, 0.0%, 0.0%) 0 0
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I tried digging deeper into the code to see the interaction between the various counters and McPat but it's gonna take me some time to fully grasp everything.
I noticed even in their presentation at ISCA, their sample report file reported Dynamic power as zero (as seen over here: https://masc.soe.ucsc.edu/esesc/resources/8-thermal.pdf). Can somebody please shed some insight as to what's causing this? Surely, the dynamic power of a cache with several thousand access can't be zero.
Thanks in advance.