Jose Renau
unread,Oct 27, 2016, 4:39:48 PM10/27/16Sign in to reply to author
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to MANIKANTH MIRYALA, re...@soe.ucsc.edu, gsou...@soe.ucsc.edu, remove, ESESC
QEMU is pthreaded
Each pthread is mapped to a different CPU
Instructions are dynamically created, so two different threads will
have two different instructions.
On 10/26/2016 6:53:45 PM, "MANIKANTH MIRYALA" <
u099...@utah.edu> wrote:
>Hello ,
>
> We would like to know some information about ESESC. So we did a
>change where we add a new pointer to each QEMU instruction that is
>being passed from QEMU to SIMU part. This pointer would be freed in
>SIMU part in Processor/Cache part. For single core simulations,
>everything works fine. Coming to multicore simulations, we see that
>some instructions which are reaching SIMU part point to the same
>pointer that we created for each instruction in QEMU part. This is
>causing memory issues for us. We would like to know how some
>functionalities are developed in ESESC:
>
>1) Is QEMU pthreaded ?
>2) If yes, how the binary instructions in QEMU are mapped to different
>threads for multicore?
>3) Why do you think two instructions are pointing to same pointer when
>they reach to SIMU part ?
>
>Answers to these questions help us in understanding the interface.
>Thanks.
>
>Manikanth
>University of Utah
>
>
>