The processor implements a "memory directory" feature that hides one or more bits of "directory" information in the ECC of each cache line in DRAM. The bit is used to indicate whether another socket *might* have a modified copy of the cache line. When a remote socket reads a cache line, it is typically given the line in "Exclusive" state, which allows it to modify the line without any additional notifications. The "home" socket must assume that lines sent to other sockets in "Exclusive" state could be modified, so it must change the "memory directory" bit(s) for the cache line. This requires re-writing the entire line.