Re: Skywater PDK
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Adam Joseph
Sep 23, 2020, 1:53:06 AM9/23/20
to Electric VLSI Editor
Alright, got all the vias and contacts in. The metal enclosure for
vias+contacts is based mainly on examples in the pad library; it may be
possible to reduce these enclosures once we get better documentation on
the via rules. Note that we already get "foundry vias" that have
rectangular metal enclosures, so this is a big improvement over
MOSIS SCMOS even though both are ~180nm-class technologies. Look at
the third screenshot to see an example of what I mean.
DRC works for width+spacing checks. Notches don't seem to be checked
properly.
I also have NCC (i.e. LVS) working for simple FET circuits. No well
checks, resistors, gate lengths, or capacitors yet.
Screenshots below. Pretty close to being able to release something
usable in order to get feedback. Mostly I need to switch from my
heavily-customized version of Electric to the mainline code first
though, to make sure the techfile still works. I haven't rebased it in
a while.
- a
PS: the poly "floats" in the 3D view because Electric renders all
poly as field poly; it doesn't (yet) know that gate poly has
a different vertical position despite using the same GDS layer.
vias+contacts is based mainly on examples in the pad library; it may be
possible to reduce these enclosures once we get better documentation on
the via rules. Note that we already get "foundry vias" that have
rectangular metal enclosures, so this is a big improvement over
MOSIS SCMOS even though both are ~180nm-class technologies. Look at
the third screenshot to see an example of what I mean.
DRC works for width+spacing checks. Notches don't seem to be checked
properly.
I also have NCC (i.e. LVS) working for simple FET circuits. No well
checks, resistors, gate lengths, or capacitors yet.
Screenshots below. Pretty close to being able to release something
usable in order to get feedback. Mostly I need to switch from my
heavily-customized version of Electric to the mainline code first
though, to make sure the techfile still works. I haven't rebased it in
a while.
- a
PS: the poly "floats" in the 3D view because Electric renders all
poly as field poly; it doesn't (yet) know that gate poly has
a different vertical position despite using the same GDS layer.
Adam Joseph
Oct 16, 2020, 6:48:55 PM10/16/20
to Electric VLSI Editor
On Wed, 7 Oct 2020 03:19:07 +0300
Alexandre Rusev <cybe...@gmail.com> wrote:
> [image: image.png]
> Now I succceed with opening library
> Is it the the Layer Algoritm which helps to open library
No, you can open the library regardless of what rendering algorithm you
use, but if you don't choose the Layer Algorithm you won't see some of
the layers (like licon1).
> Is it correct what I see on the picture above?
Yes, that is what it should look like. You might want to adjust the
font size (control-+ and control--, or cmd-+/cmd-- on mac).
- a
Alexandre Rusev <cybe...@gmail.com> wrote:
> [image: image.png]
> Now I succceed with opening library
> Is it the the Layer Algoritm which helps to open library
No, you can open the library regardless of what rendering algorithm you
use, but if you don't choose the Layer Algorithm you won't see some of
the layers (like licon1).
> Is it correct what I see on the picture above?
Yes, that is what it should look like. You might want to adjust the
font size (control-+ and control--, or cmd-+/cmd-- on mac).
- a
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