Digital Multiplexer design
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Yugal
May 1, 2012, 8:46:06 AM5/1/12
to Electric VLSI Editor
I am a rookie.I am working on a project, its layout design of 4:1
Multiplexer.
I have planned to make it using three 2:1multiplexers. I made a cell
for 2:1 mux in electric vlsi 9.01
There's no DRC error. I did "compaction" (there's an option in
electric). But there's ERC well check error as well as are coverage
error. Why's that?
I can send you the library file so that you can suggest me something.
Multiplexer.
I have planned to make it using three 2:1multiplexers. I made a cell
for 2:1 mux in electric vlsi 9.01
There's no DRC error. I did "compaction" (there's an option in
electric). But there's ERC well check error as well as are coverage
error. Why's that?
I can send you the library file so that you can suggest me something.
analog_match
May 7, 2012, 12:14:58 PM5/7/12
to electr...@googlegroups.com
Hi Yugal,
Send me your library file. Also send me the errors you are concerned about and your settings such as technology selected, metal layers, technology node setting etc.
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