Automated Verilog to Layout Issue: cells rotated by (2k+1) x 90° during placement

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Ashwin Balagopal S ee17d200

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Jan 29, 2022, 1:44:34 AM1/29/22
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Hello,

I was testing the verilog to layout automation flow with a structural verilog netlist  for an 8 x 8 signed carry-save multiplier, the standard cells layouts for which I have already.

What I found was that while the standard cells were being rats-nested without any 90° rotation as seen in the image below...

image.png

...after placement, certain cells had ended up being rotated by odd-number multiples of 90° as an example of which is encircled in red in the image below...

image.png

Is there a way to have the placement tool only perform even number multiples of 90° flips? 

I wouldn't mind it even if the tool did the mirror operation, but odd-number multiples of 90° flips cause the poly to not run vertically throughout the layout, which is a constraint for me.

Ashwin

Steven Rubin

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Jan 29, 2022, 2:42:19 AM1/29/22
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The rat's nest wires are "virtual" connections using a wire in Electric called the "unrouted" wire. Routing tools replace them with real wires.

I can't comment on the rotated cell, but much depends on which placement algorithm you use, and there are many, so I'd need more information about how you got this design. But also, why is it wrong to rotate a circuit on its side?

   -Steven Rubin

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Ashwin Balagopal S ee17d200

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Jan 29, 2022, 2:56:50 AM1/29/22
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At the university I'm enrolled in we use electric as a hands-on teaching tool for digital IC design and layout. We've been doing so for the last 5 years and the course is quite popular exactly for this experience it provides.

Coming to the issue I have with rotation. Processes nowadays don't allow the same width of poly in 2 dimensions, or at least that was my experience in TSMC's 28nm node where the horizontal poly's minimum width was significantly more than the vertical poly.

To emulate that, we tell students to keep all the polys running along the vertical direction and refrain from jogging the poly unless it's absolutely necessary. If one needs to short two parallely running polys we ask them to via up to a convenient metal layer and then short.

I think it'd be a good idea to show the students an example of a place and route tool's output. But it must be consistent with our what is taught in the class, and having polys running in both horizontal and vertical directions isn't so.


I used the default tool settings for placement. If you need additional information I'll be happy to share screenshots. Thank you for the prudent response.

Ashwin

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