PCI Basics

[Mukund]

Hi All,

This is information about PCI Basics which we use as a one the interface for communicating peripherals in Embedded system.

What is PCI?

 Its a computer bus for attaching hardware devices in a computer. These devices can take either the form of an integrated circuit fitted onto the motherboard itself, called a planar device in the PCI specification or an expansion card that fits into a socket. The name PCI is an initialism formed from Peripheral Component Interconnect.

 The PCI specification covers the physical size of the bus (including wire spacing), electrical characteristics, bus timing, and protocols. The specification can be purchased from the PCI Special Interest Group (PCI-SIG).

 Most common PCI hardware specifications are as follows which can be used for PCI based Hardware design architecture.

 33.33 MHz clock with synchronous transfers
peak transfer rate of 133 MB/s (133 million bytes per second) for 32-bit bus width (33.33 MHz × 32 bits ÷ 8 bits/byte = 133 MB/s)
peak transfer rate of 266 MB/s for 64-bit bus width
32-bit or 64-bit bus width
32-bit address space (4 gigabytes)
32-bit I/O port space
256-byte configuration space
5-volt signaling

Find below snap shot of 32 Bit PCI slots available in PCs.

 

 

 

  What is PCI-X ( PCI Extended)?

 PCI-X (PCI eXtended) is a computer bus and expansion card standard that enhances the PCI Local Bus for higher bandwidth demanded by servers. It is a double-wide version of PCI, running at up to four times the clock speed, but is otherwise similar in electrical implementation and uses the same protocol.

 PCI-X was needed as some devices, most notably Gigabit Ethernet cards, Fibre Channel and Ultra320 SCSI controllers, and cluster interconnects could, by themselves, saturate the full bandwidth (only 133 MB/s) of the PCI bus. The first solution was to run the 33-MHz PCI bus at double the speed, 66 MHz, effectively doubling the throughput to 266 MB/s. However, machines with multiple high-bandwidth devices still needed more headroom, so additional pins were added to the slot.

 Find below snap shot of PCI-X based Gigabit Ethernet card.

 

 

 

What is PCIe ( PCI Express) ?

 Conceptually, the PCIe bus can be thought of as a 'high-speed serial replacement' of the older (parallel) PCI/PCI-X bus. At the software-level, PCIe preserves compatibility with PCI; a PCIe device can be configured and used in legacy applications and operating-systems which have no direct knowledge of PCIe's newer features.

 In PCIe 1.x , each lane carries 250 MB/s. PCIe 2.0, released in late 2007, adds a Gen2-signalling mode, doubling the rate to 500 MB/s. PCIe 3.0, currently in development (for release around 2010), will add a Gen3-signalling mode, at 1 GB/s.

 

Find below snap shot of PCIe X1 slot.

 

 

As Serial interface has Lower no. of Lines than Parellel one then How Serial Interface ( PCI e) faster than Normal parellel PCI? 

Timing skew is a direct result of the limitations imposed by the speed of an electrical signal traveling down a wire, which it does at a finite speed. Because different traces in an interface have different lengths, parallel signals transmitted simultaneously from a source arrive at their destinations at different times.

When the interconnection clock rate rises to the point where the wavelength of a single bit is less than this difference in path length, the bits of a single word do not arrive at their destination simultaneously, making parallel recovery of the word difficult.

Thus, the speed of the electrical signal, combined with the difference in length between the longest and shortest trace in a parallel interconnect, leads to a naturally imposed maximum bandwidth. Serial channel bonding avoids this issue by not requiring the bits to arrive simultaneously. PCIe is just one example of a general trend away from parallel buses to serial interconnects. Other examples include Serial ATA, USB.

Here with attached pictures of the same if its not visible in mail.

In Further sessions we will cover about signal architecture of PCI, configuration space and various commands to indentify PCI devices on bus.

 

Please let me know if requires further information for the same. 

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Above Topic is originally posted by Manish Patel (manish...@einfochips.com) and his Team. Thanks Manish