Project Evaluation

[pramod v]

Hi all,

The project evaluation will be done on Friday.

I want all the group leaders to submit 1 hard copy of synopsis today before 1700 hrs.

The synopsis should be complete in the sense that

(1)All members name should be written
(2)Aim of the project clearly written
(3)Division of Work among your team (In some of the synopsis , it was not clearly written)
(4) Block diagram of your project with each module named.

The project will be evaluated by Gaurav and Me separately and the average of marks will be taken.

The division of marks for your project is as given below

Total Marks allotted 500

(1) Design IDEA -   100 marks (the marks for this also include whether all the modules are present i.e Socket programming, VHDL, EDK)

(2) Design Implementation - 250 marks
          (a) Socket Programming Implementation - 70 marks
          (b) VHDL implementation - 70 marks
          (c) EDK implementation -70 marks
          (d) Extra features (such as GUI etc)-40 marks

(3) Design Demonstration - 100 marks


(4) Individual VIVA - 50 marks

All the Team Members get the same marks on points (1)  and (3) , for point (2) and (4) it is  based on the individual contribution.

 The evaluation will begin at 1430 hrs on Friday(29/04/11) and all groups should have their set up ready for demonstration, before this time.
 
Your FInal mark list up to EDK assignment will be posted by today 1800 hrs.

Regards,

TA's