EDA Playground has been an invaluable resource for getting the word out about TL-Verilog (Transaction-Level Verilog). I recently added several new lab exercises taking advantage of a new EP feature for TL-Verilog. The labs are here:
rweda.com/lab. They walk through TL-Verilog features, all the way through designing in the context of transaction flows, where a new feature requiring 34 lines of Verilog change is implemented in two lines of TL-Verilog. Thanks to Matthew and the gang at Doulos for the help!