getedaplayground@gmail.com

[Ufuk Yıldırım]

Greetings

I am a student from Turkey and working on a task which is given from a company during  internship which is UVM based Testbench of a simple adder design .

I am getting a lot of "XMRE" and "IND" errors which might related with same mistake of  me, as i understood.

 

Here is the URL of code : https://www.edaplayground.com/x/dRuX

I hope you will help me . 

Thanks, best regards.

[EDA Playground]

Line 13 of sa_monitor.sv should be

  uvm_analysis_port #(sa_transaction) monitorap;// declaring analysis port with name monitorap. we will instanciate in the build phase

(You parameterise a port to the transaction class it uses, not the class that contains it.)

That gives you another error regarding your virtual interface not being connected. I'll let you have a look at that.

Matthew

--

[Ufuk Yıldırım]

Thanks, i made some changes. They told me to use  Mentor Questa as simulator (i was using the synopsys vcs) and now i have problem about including different classes although there was no such a problem while using the Synopsys VCS. Should i try to package them and then include?

Here is the URL of code : https://www.edaplayground.com/x/dRuX

30 Haziran 2021 Çarşamba tarihinde saat 13:04:38 UTC+3 itibarıyla EDA Playground şunları yazdı: