UART verification using UVM

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bala chandrudu

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Jan 31, 2017, 8:47:32 AM1/31/17
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Hi Team,

can someone please share the UART bus verification testbench code using UVM. also if there are any learning resources please share to me. Appreciate your help!


Thanks,
Bala.

yogesh dhada

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Mar 13, 2017, 7:38:59 PM3/13/17
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Hi Bala,

If you find any than share with me. Thank you

EDA Playground

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Mar 14, 2017, 5:47:25 AM3/14/17
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Hi Bala,

I think the reason why nobody has replied to your question is that it is very general. It may be that there is VIP available for UARTs, but presumably for a specific kind of UART.

I must confess that I missed your second question. My company - Doulos - has a wealth of information about UVM on its website: http://www.doulos.com/knowhow/sysverilog/uvm/ . I found the videos about "Easier UVM" particularly useful. Easier UVM is a set of coding guidelines and a code generator designed to simplify using UVM. The videos explain this simplified subset of UVM, which also acts as a great introduction to UVM.

Matthew
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