SilicoNus Campus Hiring for 2018 Batch - Data required

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Chaitanya Alluri

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Jan 15, 2018, 12:01:27 PM1/15/18

to 2017 batch, 2017 batch, 2017 batch, 2016 batch, 2016 batch, 2016 batch

If any students not got the job from 2016 & 17 batch are also allowed to participate in the event

We are organizing a recruitment event with SilicoNus for the 2018 batch students of ECE and EEE on 19th and 20th January at SVECW

Following is the Eligibility Criteria

ECE and EEE (B.Tech and M.Tech - VLSI)
Only unplaced students
61% or more in B.Tech / M.Tech with no BLs

Request you to share the data of eligible students

Also communicate the details with all the eligible students

SilicONus as an organization dedicated to enabling customers with global cutting edge technology solutions, support and services. Headquartered in Bangalore, SilicONus, founded in the year 2016 with a 40+ member team with a vision to expand its man force to a 100+ member team by 2020 offering services to its clients located in pan India with a focused commitment and dedication.

The management team with its 25+ years of collaborative experience in ASIC Implementation, joined together to build a world-class team of Designers in system design offering design services in meeting the customer requirements, Time to market (TTM) in building friendly, dynamic eco-system for our customers believing in individual growth as well as the company with a learning platform.

India being one of the emerging markets for IC Industry has been identified as the breeding ground of leading R&D initiatives in multiple domains, SilicONus is committed to bringing in its expertise to meet technological challenges by catering its services in addressing the design challenges and provide its expert solutions.

As part of our academic initiative, we present you the below offer in identifying the talent pool from fresh engineers and impart core technical competence to build next generation engineers.

Pay Package:

- Training in Physical Design (Also known as Backend VLSI) for 4-6 months. ( 5k per month )

- Paid Internship in Physical Design for 1year. (1.2 lakhs / annum during Internship)
- Permanent position in Physical Design based upon the performance in the internship.
- CTC upon completion of 1 year internship
- 2.4lacks per anum.
- 30K company performance bonus paid annually.
- 30K employee performance bonus paid annually.
- Corresponding year, based on performance appraisal.

Selection procedure:

First round - Written test to check the candidate's analytical skills, technical skills and vocabulary.
Second round - Technical face to face round.
Final round - HR Round.

What to learn:

Technical skills will consist of binary systems, Boolean algebra, logic gates, Boolean functions, combinational logic, Waveform analysis, Micro controller/processor,sequential logic and state machines.

Technical Face to Face round will consist of the academic technical basics, programming basics and academic project.

Note:

1. Candidates who are selected should sign a bond for 3 years before training. (3years Excluding Internship)
2. Candidates should carry all the certificates in original on the day of examination for verification.
3. Candidates should submit their certificates (in original) on the day of joining.