Fault Collection Tony Works
Niki Wienberg
While clearly the device has five fingers totaling 100um, ASSURA says it's only 20um. It works only when just 1 finger is used. Is there an explanation to this weird behavior of ASSURA? Thank you very much. -Tony
It's unlikely to be Assura's fault - it's probably the rule deck (or the rule deck not being used properly). This is something that you either need to take up with the foundry (TSMC) or maybe as a first step Cadence Customer Support - that way we can look at the exact situation you have - and retrieve the rule deck for the specific document number you have (there are several 130nm processes, so we'd need to check the right one) and check what's going on.
When you say it only works when just 1 finger is used, do you mean just 1 finger in the layout? If so, then have a look at the netlist on the schematic side. Since you said it was a generated pcell, I assume you are using XL and the schem device has fingers=5. If still so, then it sounds like your schematic is not netlisting correctly within Assura. (assuming you are netlisting through Assura) We are seeing something similar, using Assura in a completely different PDK, different process, different fab, and in 6.17. Our netlists on the schematic side don't correctly reflect some of the parameters (such as numberOfFingers or multiplier) as defined in the schem, so we see similar parameter errors. Not blaming Cadence for this, but we haven't figured it out yet. If you can't get past this, 2 possible workarounds, until the real problem is determined, are: 1) try creating a CDL netlist first and reference that in your LVS run, or 2) consider requesting that the parameters of the schematic device be changed such that numberOfFingers is changed from 5 to 1, while either the multiplier is changed from 1 to 5, OR the instance is arrayed . When you (re) generate the layout device you will get 5 individual units rather than one 5-finger unit and will have to overlap the S/D's yourself - no big deal - and you might find better LVS results. Good luck.
To clarify, I tend to agree with Andrew in that it is not likely Assura, but perhaps the deck, which points at the PDK and thus the foundry. That is our suspicion for our own issues as well, but at this point that is only a guess. In the meantime we look for workarounds so we can keep cranking. The alternative methods I mentioned have been successful for that.
Maybe you could play with the auLvs simulation information in the CDF for the component in question to get it to netlist the right parameters, but that still assumes the LVS rules will be taking those parameters into account when combining them (if it works with auCdl, they probably are). Either way, I'd suggest you contact the foundry - potentially Cadence Customer Support could help too if we can see the setup and then give some advice on what to change to make it work.
Again, this new issue is specific to the technology you're using - and also might be related to what you've done in the layout. It's unlikely we can provide much help in the forums without being able to see more - so I'd suggest contacting the foundry or maybe customer support, as I suggested before.
Thanks Andrew. I'll suggest that to the parties looking into it. I'm more of an end user waiting at the mercy of the tools guys to get stuff up and running, while wishing I had more ability in that area myself. It feels like we need to (find, then) flip a switch to change the options on what I think is, as of yet, a rather primitive, barely locally developed, out of the box product. As I am currently ignorant on the topic, can you describe briefly the diff between auLvs and auCdl? I have a feeling I can guess that (type of netlisting?), based on your statement.
Another mystery 'we' are trying too chase down is (trying to find, and flip an options switch, probably) getting Assura LVS to not ignore dummy devices that are fully tied off. Examples of such devices would be a simple N-channel with source/drain/gate/bulk all tied to ground (or VSS), or a P-channel that has all nodes tied high. I move from place to place frequently, so I get to 'use' varying setups in terms of how teams have tailored their pdk interpretations and local runsets. So, at one place, dummy resistors can be totally ignored in LVS (not my preference), while in another place ANY device in the layout or schem, whether their nodes are tied together or not, must be accounted for. Some folks just don't care about that. Where I'm currently working, these devices are being ignored but we would prefer they not be ignored, and verified instead. Haven't figured out this one yet, though. I'm fairly sure this is simple, but don't know the method with Assura. (In the distant past, I've found and altered lines of code in (non-Cadence) decks where the option was switched.)
auLvs and auCdl are two different netlisting approaches. auLvs was originally a netlister for Diva - for Assura it doesn't actually produce an "auLvs" netlist, but uses the same CDF information to control which parameters are read for LVS. auCdl produces a "CDL" (Component Description Language, a SPICE-like format which originated with Dracula and has been extended considerably by various LVS tools since). Both are means of providing the input to the schematic side of LVS.
It's been a while so I don't remember every detail of the problem. If I remembered correctly - it seemed to be an issue with the LVS schematic extraction, and I followed Budlah's advice, avoiding the use of multi-fingered instances and instead use arrayed ones and it worked out fine.
Specific to the problem you're facing, does LVS work with a schematic & layout with only the inductor instance? If it's still problematic, then I would suggest either try using a different inductor option, or carefully simulate the physical layout, ensuring it connects to where it should connect to and works as it should work, then check off the error with the foundry (basically living with the error and waiving your rights to complain if the taped out chip didn't work, do allow for ample time to communicate!).
Ashley Burkett struggled to regain her balance while she worked to haul in dredging equipment as 10-foot waves tossed the research vessel in the Gulf of California.It was all part of gaining oceanographic research experience.
Jared Kluesner, chief scientist for the expedition, selected Burkett to work onboard the vessel to give back to his alma mater, ISU. Kluesner graduated from the geology undergraduate program in 2006 and then received a scholarship from Scripps to begin his doctoral work.
"As an ISU undergraduate, Jared benefited through the hands-on experiences on international expeditions, and now that he is in charge of a research expedition, he is giving back to the program," Rathburn said. "There is limited space on the ship, so Ashley's spot on the ship is highly valued."
"Each graduate student works with a professor and I work with Dr. Rathburn so this is how I was given the opportunity for this trip," Burkett said. "I was surprised that I was selected for this trip so early in my studies because usually you have to work in a lab performing research before you are rewarded with opportunities to actually go collect samples yourself."
"This rare international opportunity is coming at an ideal time in Ashley's career, and experiences from this expedition will provide her with excellent training and exposure that will enhance her knowledge base and expand her abilities and professional connections in marine science," Rathburn said.
Burkett explored the Gulf of California and studied the geological process at work in the region. There, the seafloor is slowly rifting apart as new ocean crust emerges through volcanoes and other underwater features to form a new ocean basin in the Pacific.
The separating mainland Mexico from Baja California, where this gulf is located, is one of the few places on earth where scientists can actively study the birth and formation of an ocean basin because it is currently going through the transition from continental rifting to seafloor spreading. This gulf has been widening for the past 15 million years.
Aboard the 170-foot-long research vessel, there are state-of-the-art research instruments to study marine life, the oceans, the seafloor and the atmosphere. This vessel contains more than 1,200 square feet of research space.
"My favorite part of the research would have to be the pockmarks because there are multiple explanations for why they form," Burkett said. "Pockmarks occur when fluid comes up through the ocean floor and sediment can't settle there so it creates a crater-like hole."
Pockmarks can be pictured by thinking of the moon's appearance with its many craters. Just west of Baja California and within the Gulf, pockmarks can be more than a kilometer across and hundreds of meters deep. Kluesner introduced Burkett to this because he is very interested in how these big holes form.
The main objective besides researching the pockmarks was to gain a better understanding of the geology of the floor in the Gulf of California. The dredges pull up igneous rocks that the scientists study to determine ages of the rifting faults and associated magmatism.
Before the expedition took off, Kluesner set up a Web site that included an interactive blog, images, maps and a tracking system that allowed students and teachers to interact with the scientists while they were gone.
"This experience gave me a heads up on what it is like to work on a research vessel," Burkett said. "I am really glad I did this, even though I was nervous, because it prepared me for later research experiences, including the research cruise in Costa Rica early next year."
Cutline: Jared Kluesner, Indiana State alumni and doctoral student at Scripps Institution of Oceanography, examines rock specimens dredged from rifts in the Gulf of California. Courtesy photo.
The plaintiff and her husband lived on the third floor of a house belonging to the defendant and rented from him by the husband. On the morning of 23 October 1918 her husband was found dead and she was found unconscious in their bedroom. This was due to gas poisoning, the gas having come, according to the plaintiff, from the floor below. On the floor below the defendant was having gas replaced with electricity, and had retained G, a master plumber, to remove the gas pipes. At the end of his work on 21 October, one of Gs workmen failed to plug the gas pipe leading from the gas meter to the apartment of one Gr., a publican. The gas meter was turned off at the time, but it was turned on by Gr. on 22 October, and gas then flowed out of the unstopped pipe and filtered through the ceiling into the living quarters above, those of the plaintiff and her husband as well as those of Gr. himself.
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