Vivado Download Board Files
Germain Ojeda
This guide will show the process of installing and configuring the Vivado development environment, used for developing projects to run on Digilent FPGAs. In addition to the installation, Vivado will be pointed at Digilent's board support files, which are used to make the process of creating a new project significantly faster. In addition, the board files make it significantly easier to add a variety of peripherals (such as DDR memory) to a project. Xilinx SDK, used for developing C/C++ projects that target your hardware designs created in Vivado, will be installed as part of this process.
Digilent provides board files for each FPGA development board. These files make it easy to select the correct part when creating a new project and allow for automated configuration of several complicated components (including the Zynq Processing System and Memory Interface Generator) used in many designs.
The board files will be copied into your version of Vivado's installation directory. At the end of this section, an alternate method of installation is presented, which users familiar with git may find more convenient.
Open the folder that Vivado was installed into - C:/Xilinx/Vivado or /opt/Xilinx/Vivado by default. Under this folder, navigate to its /data/boards/board_files directory. If this folder doesn't exist, create it.
I have a ZedBoard (Zynq XC7Z020) on which I wish to prototype some software on a MicroBlaze that will eventually be moved to a ZCU-102, and ultimately to a custom IO card. I was given the ZedBoard and installed the Xilinx software that came with it, but ISE 14.1 seems to have some trouble with Windows 10 (file selection dialogs don't always appear, and it can't seem to talk to the network very well), so I've installed Vivado 2021.1. Unfortunately, none of the directions I've found for installing the board files work properly under this version of the tools - it seems the stuff on GitHub (XilinxBoardStore / XilinxCEDStore) are not supported (I can't get them to work following the directions I've found, at least), and when I tried editing the Vivado start-up tcl script, the XML files appear available on the Diligent site seem to be incompatible (it breaks Vivado), so I cannot seem to create a project for the ZedBoard using Vivado 2021.1.
I beg to differ. In fact Vivado is no good for doing PCIe based designs for the NetFPGA-1G-CML board that Digilent sells. I know, because I've tried. The Vivado support for PCIe simply doesn't work ( at least on Vivado 2019.1 forward ) for the XC7K325T-1FFG676 part for this board because it only has 4 transceiver lanes, because of the lanes that the board designers chose to use, and because Vivado refuses to let you select the correct GTX bank. If anyone has discovered how to do this I'd like to know the secret.
I would suggest that an earlier version of Vivado, say 2018.4, might be the best option for the Zedboard. I've done Vivado development for that board on Win10. One thing to you need to do is figure out if the version of your board is supported by Vivado. I have an older one had to spend some time trying to figure out what board version to choose and what the revision changes were because the Vivado installations that I have on Win10 don't support my board explicitly.
Can you do development work for the Zedboard using VITIS? I don't know because I haven't had the time to work my way through the maze. Unless you need VITIS experience I suggest that using a version of the tools that were new about the time that your platform was designed is the easiest way to get to a working project development cycle. You can spend weeks trying to convert old demo projects to the newer Vivado releases. Who has the time for that? Certainly not Digilent, though they still sell the board. That should tell you something. Understand that for ZYNQ development you have 2 toolchains to debug; HW and SW. VITIS simply wasn't designed for the Zedboard.
Hey hey hey, we actually do upgrades of old demo projects. We'd done that last year and we've done it again this year. Check the //update branches of some of our github repos. As for the Vitis development for the Zedboard, the only issues I had last year with upgrading the Zedboard FMC-Pcam-Adapter demo from Xilinx SDK 2019.1 to Vitis 2020.1 were some makefile errors that I solved easily with a search through xilinx's forums where I found the solution which required modifying some makefiles. Now upgrading this Zed project from 2020.1 to 2021.1 should be pretty straightforward as it's all just Vitis.
Well, OK, there have been some demo projects that have been upgraded to support popular hardware, like the PCAM board. I didn't mean to suggest that none of your demos would work, as is, on the latest tools. But what percentage of the demos pointed to by product support pages can the latest version of Vivado or VIVIS open and create HW/SW that runs the demo? A quick perusal through Digilent's main pages and github pages suggests that the percentage is not very high. And since almost all of Digilent's demos use either MicroBlaze or ZYNQ that's a lot of demos tied to old versions of the tools e.g. Vivado 2018.x...
So perhaps the lack of a "Refresh" button is because the GitHub repository has no board files updated for 2021.1; I'm not sure how to rectify this - I know Tcl well enough, but there's a lot of it in the various directories, and I'm pretty sure that changing things arbitrarily is not the key to a smooth experience.
Are there any tutorials that walk you through creating a MicroBlaze on a board that does contain a Zynq device (the tutorial I linked abovve is very explicit that the instructions for the MicroBlaze should not be used with a Zynq device), connecting it to a serial port and some GPIOs, and running some sort of "Hello World" application on that? I created a project with a MicroBlaze and added a GPIO block, but am unsure what to do next to connect a UART either from the Zynq PS or add one to the fabric and route it to the pins that connect to the serial-to-USB on connector J14. I'm a software engineer, so my experience with these tools is somewhat minimal, so I need a bit of hand-holding.
I haven't explicitly tried using the board files from the Xilinx store (I usually copy the materials Digilent has on our Github, -boards, into the Xilinx/Vivado//data/boards/board_file directory and then create a project from there. The Zynq IP block that you add in through the Getting Started with Vivado IP Integrator guide handles the UART connections for you and walks you through adding GPIO connections.
This is a prototype for a system that won't be on a Zynq board - it's going to be in a Kintex conneted to the applications processor via PCIe. I'm doing this stuff on my own because when the funding comes to do it for real, I will have less than 3 months to bring it all together, and I have never done anything with a MicroBlaze before. At the same time, I hope to learn a bit more about FPGA designs and capabilities. I've worked on several embedded FPGA SoC projects before, but all of those have been Cortex-M microcontrollers. I'm not looking for anyone to solve the shared-memory or other inter-processor communications issues, I just want enough experience with the environment that I can hit the ground running. The ZedBoard was available for me to borrow to take home - I'm looking at this as professional development. I will not be implementing the actual application on this board, but what I learn will help immeasurably when the funding at my work gets turned on.
There's nothing wrong about what you want to do. It's a shame tha you have to work with a ZYNQ based board though because this will likely double the work and learning curve. But one has to work with what one has.
If you look around I'm sure that you can find application notes or project sources for implementing an ARM/Soft-Processor design. You can tie off the ARM and just proceed as if you were working with an Artix 75 device because that's roughly the equivalent of what the Zedboard PL has in terms of resources. There are applications notes for that. My suspicion is that your will largely have to work from scratch because you won't find a tutorial that has everything worked out for you. This isn't a bad thing as you are correctly trying to get up to speed before deadline craziness becomes a impediment to progress.
"The MicroBlaze will also interface with some other hardware that is time critical and requires deterministic response times"
I don't associate soft-processors with concepts like 'time critical' or 'deterministic'. Logic and state machines perhaps. But again you have to work with the requirements, and time budget, that you have been given.
On the bright side perhaps you can compartmentalize you objectives. If you aren't familiar with working with FreeRTOS and Xilinx tools then the Zedboard can provide that for your platform using ARM instead of MicroBlaze. The working theory here is that whoever designed the system architecture and decided to save time by using MicroBlaze has reason to believe that it was up to the task(s) in terms of latency and throughput. I'm not sure that MicroBlaze saves time or complexity over standard logic development, but this depends on a lot of factors.
As for PCIe I'm not sure that your platform can help much in terms of getting a 'feel' for how well the MicroBlaze will work. You can certainly to experiments with DMAing data from the PL to the Zedboard memory. The maximum possible is about 1200 MB/s which is likely way lower than any multi-lane PCIe you will have in the final hardware. A big consideration is whether or not your Kintex PCIe MicroBlaze uses external memory for data buffer(s). On the Zedboard, like most ZYNQ platforms, the only DDR is connected to the PS memory controller.
The biggest problem for you to solve, at least from my perspective, is to figure out how many pound of learning effort you can stuff into the time sack that is now to when things get serious. Personally, I'd want to minimize the number of extraneous unknowns and try and concentrate on a few specific areas of investigation and learning.