XOR Schematic Design

[Prashanth Anil Mascarenhas]

Hi Rajesh, Siva,

I have attached file of Design of XOR gate.

As discussed , I have made 3 design of XOR gate:

1. XOR using transistors

2.XOR using transmission gates.

3.XOR using minimum gates.

Thank you.
--
Regards,
Prashanth Anil Mascarenhas,
+918904231492,
Sankalp Semiconductor Pvt Ltd.

[Prashanth Anil Mascarenhas]

Rajesh,

1. Yes. Since it was different in structure I had put that.

2.a)I have connected an Inverter at the end to get an inverting output.

   b)Yes, I have given as B and BB .

   c)Done.

   d)Done.

3)I think the schematic is correct. I am working on schematic realized by 10 transistors.

I have attached the schematic using TG with modification done.

On Thu, Jan 31, 2013 at 1:55 PM, Rajesh Rebba <raje...@sankalpsemi.com> wrote:

Prashanth,

1) 1st one is wrong. because i/p pin is going to Tx gate.

2) look fine. few  modifications required
   a) get an inverter at the output pin
   b) use different names for B and buffered B. like B, BB.
   c) Abar to A inverter is not required. because A pin can go to gate of Tx gate.
   d) Use Abar name as AZ and Bbar name as BZ.

3)  It is wrong. Hint is schematic can be realized in 10 transistors.

   Do the changes required in 2 nd schematic and send back.

Regards,
Rajesh.

--
Thanks & Regards,
Rajesh Rebba
Ph.no:+917411778052

[Prashanth Anil Mascarenhas]

Rajesh,

Regarding 10 transistor XOR gate.

I have realized manually and have attached file of XOR gate using 10 transistors.

Kindly check it.

[Prashanth Anil Mascarenhas]

Rajesh,

 In that Schematic,

Y-> XOR and

YX -> XNOR.

Correct me if I am wrong.

On Thu, Jan 31, 2013 at 4:52 PM, Rajesh Rebba <raje...@sankalpsemi.com> wrote:

Prashanth,

Why YZ at o/p. get Y only.
Hint : current schematic is exactly equal to enor

with small modification you can get exor functionality with Y as o/p pin.

Regards,
Rajesh

[Prashanth Anil Mascarenhas]

Rajesh,

 I have modified the schematic and attached here.

Here Y->XOR

[Prashanth Anil Mascarenhas]

Rajesh,

Ok. Nice.

About the other architecture , I have attached two files based on Boolean function.

Kindly check and let me know if there is any changes.

And I will be on leave on Monday. So, It will be nice if I work with simulations a bit today.

So the first architecture was on transmission gates, If any simulations to be done on this please inform me.

Thank you

On Thu, Jan 31, 2013 at 7:25 PM, Rajesh Rebba <raje...@sankalpsemi.com> wrote:

Prashanth,

Good, this looks proper.

Tomorrow you can work on other architecture.
Hint: You can derive form Boolean function.

Once you are done with schematics, can start with simulations.