Re: MoM-DCL DD4 Team Meeting - 05th March 2013

2 views

Skip to first unread message

Prashanth Anil Mascarenhas

unread,

Mar 6, 2013, 12:46:08 AM3/6/13

to Avinash Venigalla, Digita...@googlegroups.com

Where was Siva and Rajesh present?

On Wed, Mar 6, 2013 at 11:12 AM, Avinash Venigalla <avin...@sankalpsemi.com> wrote:

Hi all,

MoM- DCL DD4 Team Meeting - 05th Mar 2013
Attendees:Avinash, Sushant, Rakesh, Prashanth , Siva , Niraj and Rajesh.

Minutes:

1.Discussion on why gate cap is more in FF : FF is related to process the rise in gatecap can be due to the variation of dielectric thickness happened during process.

2.Analysis has to be done with proper objective and also discussed about the different phases involved in it - objective,literature survey,experiment,conclusion.

3.Debate on the quiescent point -- When an RC network is exited by a pulse waveform what was the value that the simulator takes at t(time)<0 ----- It was answered by Niraj that the simulator always start from the quiescent point.

4.Discussed about the calculation of the gate capacitance with the testbench setup having one inverter and voltage source.
5.Advisement on the algorithm for finding the floating gate nodes --- Advised to find out the test cases where the floating gate can occur.

6. Conferred on various algorithms -- glitch algorithm,delay degradation used for computation of setup and hold time.
Action-Items:

Sl No. What Who When (End-Date)
1 Creation of Spread Sheet in Google drive for track of the technical questions raised along with the solution Team DD4 6th March
2 Algorithm and script for finding out the setup and hold time using the ocean scripting. Team DD4 (Individually) 8th March
3 Team should develop an algorithm to find the Floating node check and also an algorithm to find the Short circuit path from VDD to VSS. Team DD4 (Individually) 8th March
4 Team have to find out whether Tsetup + Thold =0 Team DD4 (Individually) 6th March

If i miss out anything ,please let me know .
--
Regards,
Avinash Venigalla,
+919620394049,
Sankalp Semiconductor Pvt. Ltd.

--
Regards,
Prashanth Anil Mascarenhas,
+918904231492,
Sankalp Semiconductor Pvt Ltd.

Reply all

Reply to author

Forward

0 new messages

Sl No.	What	Who	When (End-Date)
1	Creation of Spread Sheet in Google drive for track of the technical questions raised along with the solution	Team DD4	6th March
2	Algorithm and script for finding out the setup and hold time using the ocean scripting.	Team DD4 (Individually)	8th March
3	Team should develop an algorithm to find the Floating node check and also an algorithm to find the Short circuit path from VDD to VSS.	Team DD4 (Individually)	8th March
4	Team have to find out whether Tsetup + Thold =0	Team DD4 (Individually)	6th March