Open positions in BCA WLAN team

[Venkatesh Ragala]

Dear All,

Below are the open positions in our team. If any one of you or your friends are interested, please send your resume.

Location: Sunnyvale 

Job description:

Primary job is to work on architecture, RTL Implementation and Verification of 802.11 MAC layer designs. In this role you will also interact with the protocol, software, and systems teams at various phase of the design flows. 

Requirements : MS +10 years of relevant experience is required.  Experience in implementing hardware designs for networking, especially wireless networking protocols ,is required. Experiencing in implementing AES, and various encryption protocols is also desirable. Demonstrated ability to innovate and make architectural and design trade-offs for balancing performance/power/area of designs

 

 

Location: Sunnyvale 

            Primary job is to architect verification environment and responsible for verification of 802.11 mac layer design.

Job Requirements** * Typically requires a BS in EE/EECS with 9-12+ years of experience or an MS in EE/EECS with 6-9+ years of experience * Experience in production tape-outs of complex SoCs (preferably including wireless devices) * Deep understanding of HVLs: System Verilog/OVM/UVM, RTL design experience (VHDL/Verilog/System Verilog) and/or very strong OO programming experience is also a plus * Experience building verification environments for 802.11, Ethernet or other networking/communication protocols. * Experience with functional coverage, and assertions and other formal techniques. * Working knowledge of coding and scripting in Perl, Python, Tcl, Shell, and C. * Experience with logic simulators and debug tools from Cadence.

 

 

Location: Sunnyvale 

            Primary job is to architect verification environment and responsible for design/verification of 802.11 phy layer design.

Job Requirements** * Typically requires a BS in EE/EECS with 9-12+ years of experience or an MS in EE/EECS with 6-9+ years of experience * Experience in production tape-outs of complex SoCs (preferably including wireless devices) * Deep understanding of HVLs: System Verilog/OVM/UVM, RTL design experience (VHDL/Verilog/System Verilog) and/or very strong OO programming experience is also a plus * Experience building verification environments for 802.11, wireless protocols and  or other networking/communication protocols. Strong DSP background and verification experience of signal processing modules is a must. Experience with functional coverage, and assertions and other formal techniques. * Working knowledge of coding and scripting in Perl, Python, Tcl, Shell, and C. * Experience with logic simulators and debug tools from Cadence

Thanks,

Venky