| 17104BR | |
| Field Applications Engineer, Principal | |
| Sales | |
| Job Description: The Infrastructure Networking Field Applications Engineer is responsible in providing technical support for all networking products which include network switches and physical layer devices. Key responsibilities are to assist customers in running switch Software Development Kit (SDK) in their OS / platform environment, debug SW bugs, write / suggest software fixes, and suggest the appropriate use of APIs. Understand Ethernet protocol / switching / packet processing architecture thoroughly and answer customer queries regarding the features, providing timely and accurate information. Work with Sales Account Manager to increase demand for Broadcom Networking products. Understand the customer’s application in order to identify key technology and product features for next generation products. Act as technical liaison between Infrastructure Networking Software Development Team / Factory Application teams and the customer. | |
| 10+ years of experience in Embedded software design, development and testing. Experience in Customer Support role is a must. BSEE or Equivalent degree in Computer Science / Computer Engineering / Electronics and Communications Technical Experience Requirements: - Working knowledge in network switch / router, L2/L3 SW Stack - In-depth understanding of networking and routing protocols - Device drivers: Testing and debug level Experience - OS: Linux, VxWorks - Strong coding / debug experience in C, C++ and scripting languages - Broadcom Switch based system design experience is a PLUS - MIPS programming experience is a PLUS - Strong verbal and written communication skills - Should be a team player, independent, self-starter, and adaptable to rapidly changing market requirements. Travel: 5 - 10% Dept: Sales Location: Bangalore | |
| India | |
| India Cities | |
| Bangalore | |
| 1st Shift - Day | |
| 5% - 10% | |
| Sales | |
| Field Applications |
| A | 16095BR |
| Engineer, Sr Staff - Software Systems | |
| Infrastructure and Networking | |
|
Key
responsibilities are a) maintaining a SDK release branch that may
contain specific changes for targeted Customer(s) b) periodic regression
testing of the branch c) delivering patches out of the branch in a
timely manner and d) coordinating with global Development teams to
review the changes going into Customer branch and consolidating them
into Development branches. In addition the candidate is expected to assist Customers in running the Broadcom SDK in their OS/platform environment, be familiar with embedded OS's like Linux and VxWorks, troubleshoot and identify s/w bugs, write/suggest software fixes, suggest the appropriate use of APIs and give SDK overview/device specific presentations. The candidate is expected to have a thorough understanding of TCP/IP protocols, Ethernet Switching, switching/packet processing architecture and be able to answer customers' questions regarding the features, providing timely and accurate information. Understand the customer’s application in order to identify key technology and product features for next generation products & act as a technical liaison between Software Development Teams and Factory Application Teams/Customer. | |
| *Minimum of 8 years of relevant experience in Embedded/device driver/Protocol Software Design, Development and Testing *Bachelor’s degree in Computer Science or ECE/Electronics is required, Master’s degree a plus. *Highly motivated self-starter & team player; ability to use own initiative; *Working knowledge in TCP/IP Protocols, L2, L3, MPLS and MPLS VPNs, Switching/routing protocols * Device driver experience - development and debug level * OS: Linux/VxWorks and/or other RTOS experience is required * Must possess coding/debug experience in C/C++ *Knowledge of advanced features/protocols like Mac-in-Mac & Trill is desirable. *Utilize traffic generation tools such as IXIA or Spirent. *Ability to apply an innovative approach to troubleshoot and solve complex problems. *Experience in Customer interaction/support role is a plus *Strong verbal and written communication skills |
|
| India | |
| India Cities | |
| Bangalore | |
| 1st Shift - Day | |
| 10% - 25% | |
| Engineering | |
| Software Systems |
| 15968BR | |
| Engineer, Staff II - IC Design | |
| Infrastructure and Networking | |
| This position is for DV of a very high end state of the art SOC with integrated CPU * Contribute to the development of overall DV strategy, environment build, test development and coverage methodology * Develop BFM's for the various modules of complex interfaces like PCIE/USB etc * Create block and chip level test plans to verify proper functionality * Create and Analyze coverage metrics to ensure completeness |
|
| * BS or MS in Electrical or Computer Science * 5+ years verification , preferably in ethernet switch products or processor based SOC’s * Good understanding of PCIE/Ethernet related protocols * Developed Behavioral level models using Verilog/System Verilog * Good programming skills in System Verilog and shell scripts * Knowledge of SYSTEMC, TCL , PERL, a definite plus * Contribute to creation of test plans at block/chip/system level, develop tests and run simulations |
|
| India | |
| India Cities | |
| Bangalore | |
| 1st Shift - Day | |
| 10% - 25% | |
| Engineering | |
| IC Design |
| 15608BR | |
| Engineer, Staff II - IC Design | |
| Infrastructure and Networking | |
| Enter
Job Description Heren this role, the candidate will play a key role in
designing network switching SOCs for Broadcom Corporation. The role is
technically challenging and multidimensional in many ways. We prefer an
individual that can demonstrate their technical leadership skills by
bringing new initiatives in an effort to improve our RTL-to-GDS design
flow and engineering process. Responsibilities include the place and
route implementation, STA analysis , physical verification, clock tree
building. The candidate will utilize his/her hands-on skills in the following areas to design and develop our SOCs: clock planning, power planning, circuit analysis with IR-drop, coupling, place-and-route, parasitic extraction, timing optimization, analysis etc. You will not only tape out these chips, but also contribute to enhance our reusable methodology and flow. Additional responsibilities include interacting with the product design teams, as well as the internal IP and library groups. | |
| Job Requirements: This position requires 6-9 years hands on experience with physical design and analysis tools from Magma/Synopsys/Cadence , along with good understanding of overall RTL-to-GDS flow , circuit analysis , STA timing concepts is required. Good scripting skills in Perl and Tcl will also be required. Candidate should be a good team player | |
| India | |
| India Cities | |
| Bangalore | |
| 1st Shift - Day | |
| None | |
| Engineering | |
| IC Design |
| 16623BR | |
| Engineer, Staff II -Top Design RTL Integration Lead | |
| Infrastructure and Networking | |
| Opportunity
is with Broadcom’s Leadership Network Switching Business. Our products
are leading the way from the SMB market, to the Enterprise market, to
the Service Provider market. You will be part of the team that develops
and leads the market in the most advanced switching solutions in the
industry. We are looking for Highly Motivated and Capable Design Engineers who can work independently on top integration and design. Should be proficient in important aspects of Chip Design viz. Clocking/Reset/Power and Timing Closure. | |
| Educational qualification: B.E./B. Tech. with specialization in VLSI (M.E./ M. Tech./M.S). Years of Experience: 6+ years Well versed in top integration and design aspects - clocking, chip reset sequence, IO padring, power reduction techniques etc Experience of Networking Protocol and exposure to IP (PLL, SerDes, Processor cores) integration is Highly Desirable. Worked on different phases of design flow from RTL design to synthesis to chip timing closure Co-ordinate RTL release between individual block owners and work with DV on full chip verification Expert in setting up design methodology, developing chip constraints and working with PD/DFT teams on STA and timing closure Highly motivated and independent contributor Need to be well organized, meticulous, and detail oriented. | |
| India | |
| Home Office | |
| Home Office | |
| 1st Shift - Day | |
| 5% - 10% | |
| Engineering | |
| IC Design |
| 13902BR | |
| Engineer, Staff I - Software Development | |
| Mobile and Wireless Group | |
| Application and API development engineer with experience in wireless networking technologies | |
| Application and API development engineer with experience in wireless networking technologies. Required Experience: • BE\ME in Computer Science or Electrical Engg • 3+ years of industrial experience in SW development • Strong C programming skills • Experience in socket programming. • Systems programming experience on WIN32 or Linux / Android platforms. • Experience in developing modem APIs for Wireless technologies • Knowledge of developing Library modules (.dll for Windows, .so for Linux) • Knowledge of Android / Linux operating system commands, driver usage. • Knowledge of Windows handing of devices (device management, installers, device properties) • Knowledge of scripting languages like Python • Experience in MAC OSX would be plus • Experience on different application development frameworks (Qt, Java, MFC, etc) would be plus |
|
| India | |
| India Cities | |
| Bangalore | |
| Any | |
| 5% - 10% | |
| Engineering | |
| Test |
| 13066BR | |
| Engineer, Principal - IC Design | |
| Mobile and Wireless Group | |
| 10+
years of experience in digital front end having taped out 3 or more
chips with good knowledge of the ASIC front end design flow. Must have worked on at least one chip as the top level lead. Must be very proficient in chip architecture, RTL design, verification, coverage and must have designed a few large RTL blocks. Good concepts of synthesis, STA, DFT, logic equivalence checks. Must have a good knowledge in scripting tools and automation methodologies. Must have experience in low power designs using power islands and voltage scaling and leakage reduction techniques. Must have experience in Si bring up and should have good knowledge of lab equipments. Must have good knowledge of ARM processors and bus protocols like AHB, AXI, APB. Must be knowledgeable in few of the host interfaces like SDIO, USB, PCI, PCIe, HSIC, memory interfaces etc. Must have experience in interfacing with analog blocks like PLLs, ADCs, DACs, Analog PHYs, IO Pads etc. Should have good communication skills to resolve design issues working with cross-functional teams across the world. Should have mentored junior members. | |
| -10+
years of experience in digital front end having taped out 3 or more
chips with good knowledge of the ASIC front end design flow. Must have worked on at least one chip as the top level lead. Must be very proficient in chip architecture, RTL design, verification, coverage and must have designed a few large RTL blocks. Good concepts of synthesis, STA, DFT, logic equivalence checks. Must have a good knowledge in scripting tools and automation methodologies. Must have experience in low power designs using power islands and voltage scaling and leakage reduction techniques. Must have experience in Si bring up and should have good knowledge of lab equipments. Must have good knowledge of ARM processors and bus protocols like AHB, AXI, APB. Must be knowledgeable in few of the host interfaces like SDIO, USB, PCI, PCIe, HSIC, memory interfaces etc. Must have experience in interfacing with analog blocks like PLLs, ADCs, DACs, Analog PHYs, IO Pads etc. Should have good communication skills to resolve design issues working with cross-functional teams across the world. Should have mentored junior members. | |
| India | |
| India Cities | |
| Bangalore | |
| 1st Shift - Day | |
| 5% - 10% | |
| Engineering | |
| IC Design |