DAVIS Behavior on Event Overloaded

[Tianwen Fu]

Hi, 

As mentioned in this section (https://docs.inivation.com/hardware/hardware-advanced-usage/biasing.html#pixel-bandwidth-vs-chip-bandwidth), “if lots are produced by pixels at the same time so that they are queueing inside the chip to be transmitted.” When the event generation speed temporarily exceeds the readout speed, will the queue event have correct timestamps or will their timestamp be assigned (wrongly) when read out? If they have correct timestamps, how large is the on-chip storage (i.e. how many events can it temporarily store before reading out)?

Thank you!

[Tobi Delbruck (INI)]

The events are "stored" by pixels, i.e. pixels are waiting to send their
ON or OFF events. The DAVIS346 pixels have an "all or nothing" mechanism
that latches this state until the pixel is serviced.

Therefore with high event rates timestamps become skewed.