64KZ-II Rev B Manual and Schematic Needed

[Amardeep Chana]

Hi Everyone,

I just purchased a 64KZ-II board and was surprised that it doesn't match the board described in the common user manual that is available.  It turns out that it's a Rev B of the board and they've replaced the big 40 pin AMD chip with two smaller Motorola chips as well as rearranged quite a bit of the layout.  I assume the switch settings are still the same. The problem is it is missing an IC from a 16-pin socket. I can see the silk screen underneath it says "DELAY" so it might be a digital or analog delay line of some sort.  But without the updated manual and/or schematic I don't really know how to repair this.  Does anyone have a copy of the updated docs for it?  Attached is a photo of the board for reference.

Thanks for any help!

Regards,

Amardeep

[Amardeep Chana]

It seems this is an older revision than the common documentation.   It says LEGEND REV B at the lower right of the silkscreen whereas the manual and schematics cover the LEGEND REV E which is printed near the top of the newer board.

[Mike Stein]

A member of the S100 group had purchased this board about a month ago and discovered the same thing, 

namely that there doesn't seem to be any documentation for any rev earlier than D or E, and that this board 

is missing what seems to be a delay line. He returned it for a refund but I believe the seller reduced the price

down to around $20 because of the missing chip, so I hope you didn't pay any more than that.

I only have rev D or later so unfortunately I can't help; maybe someone else here has a rev B board so you can

at least get a number for that chip, unless it happens to be the same as the later revs.

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[Amardeep Chana]

I paid about $60 shipped but looking back at the listing the seller did write that it's parts/repair only and is missing the delay module.  I just missed that detail but likely would have bought it anyway.  If I had realized it was an undocumented revision that probably would have changed my mind.

I'll try putting a makeshift delay line on there to see if it works. This seller also has a number of other S100 boards listed and since discovering this part missing I've noticed almost all of them are missing some critical ICs.  The 4FDC he has is missing the FD1771 as well as two other parts.  He had a 16FDC without the FD1793 but I made a relatively low offer for it which he accepted.  At any rate, I'm not worried too much.  If I can't this memory board working it will just go into the curiosity pile of rare thingies.

Thank you very much for the useful background info.

Kind regards,

Amardeep

[Mike Stein]

I guess he had a couple of other bids; he'd originally relisted it for $20.00 and in all fairness he did

mention the missing delay line in the description.

I happen to have a 64KZ-II Rev E in front of me, but the delay line is labelled with an unfamiliar logo

showing a 3 in an inverted triangle, the part number DDU-7 and a date code 8079. I believe I have at 

least one other board and IIRC the delay line on that one is a Belfuse part with a 'normal' part number; 

if I run across it I'll let you know.

Are the chips still socketed? Might find a use for those RAM chips somewhere ;-)

Good luck; glad to see you're still around, I've enjoyed your posts over the years and found many personally

useful; thanks!

m

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[Amardeep Chana]

Well...after all the research and helpful responses here and on VCF, I think the best course of action is to return it.  I did manage to pick up a CCS 2066 which is the model of RAM boards I had in my Z2D back in the day.  So I can get my current machine up to 256KB with that and the three other 64KZ boards in it.

Longer term I'd like to make a modern board for Z80 Cromix users.  It would have seven 64KB static RAM chips and support the maximum memory configuration.  One of the s100computers.com boards does partial support for Cromemco bank switching but it doesn't support the full Cromix requirements as it only implements four of the eight port 40h bits.  Also it being a single RAM chip it cannot support the simultaneous writes to all the banks.  That's why the version I'll design has one SRAM per bank.  It should be a fun endeavor.

Thanks again for the help and kind words.  I'll respect the fact that you're keeping a low profile here but I think I know who are.  :-)

Best wishes,

Amardeep

[Walt Perko]

Hi,

 

IF they don’t want the board back, can you send it to me in Las Vegas, NV.  I can at least add it into my stash. 

 

 

 

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[Mike Stein]

I think you're probably right to return it; even if you did find that
delay line there could well be other issues.
A fellow collector here in my town just sold three 64KZ-IIs for a good
price and I suspect the person who
bought them has gone to 68K Cromix and 4MB boards; I'll ask him if by
chance he'd part with one or more.
Maybe he'll read this anyway.

What would be nice is a RAM board that lets you run Z80 Cromix as well
as a 68K version without switching
cards; AFAIK you can only do that with one or two 256KZs, but that's a
little small for a late version of Cromix+ ;-)

AFAIK Z80 Cromix won't run on a 1024KZ, but there were several
versions of 256KZs upgraded to 1024K;
one version retained the block select PROM and I wonder whether it'll
actually run Z80 Cromix.

FWIW, the new 4MB RAM cards from the S100 group seem to work well with
Cromix+, but I gather you're
mainly interested in the Z80 versions.

Anyway, I hope the seller accepts your return; good luck, and looking
forward to seeing that new RAM board!

m

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[Amardeep Chana]

Hi Mike,

You got me thinking about that memory card concept and I think it would be fairly useful to pursue something that can handle z80 and 68000.  They could both fit on the same card and possibly even share the same SRAM chips. I'll think about using a CPLD for glue logic that could handle both access modes.  What is largest RAM Cromix+ can address?

The only reason I tend to focus on z80 is I don't have a DPU and have never even seen one come up for sale. In today's environment I doubt I'll ever see one for a price that would be in the hobby range due to all the collectors that will spend big dollars due to the investment potential.

ZPU has been replicated.  I wonder how hard a 68K board could be.  Wouldn't it be great to little by little reproduce a complete system that can run Cromix and eventually Cromix+?

Thanks,

Amardeep

[Amardeep Chana]

Hi Walt,

They have a fairly amenable return policy so it wasn't a problem.

Regards,

Amardeep

[Mike Stein]

Hello again Amardeep,

The 256KZ can indeed run in 64K block mode for the Z80 or in a
vertical 68K configuration, so you can multi-boot by selecting a Z80
or 68K Cromix at boot time. I'm not sure you could go above 512K and
still be Z80-compatible though; later versions of Cromix+ require more
than that just for the system ;-)

The S100 group has a quite formidable collection of modern S100 boards
including large (4 & 16 MB) RAM boards and at least one 68030 board
AFAIK, and Damian Wildie (who's on this list) has indeed 'ported'
68010 Cromix+ to it and modern RAM & I/O boards; might be interesting
to chat with him.

http://www.s100computers.com/My%20System%20Index%20Page.htm

It would be interesting to compare a genuine Cromix+ system to one
running modern boards; Cromemco's 2048KZ memory boards have a 32-bit
transfer mode which might make it faster than the S100 4 or 16MB RAM
boards; also, the MSU boards have error correction which AFAIK the
others don't have, AFAIK max memory is 16MB.

I don't recall offhand whether anyone has ported Z80 Cromix to any
modern hardware; I haven't run across any, but there is at least one
software emulation AFAIK.

What would you consider a 'hobby' price for a DPU? For that matter,
what's a 'hobby' price for a 64KZ-II ?

m

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[Amardeep Chana]

Hi Mike,

Now that you mention it I do remember reading a while back about the Cromix+ port to the S100Computers.com hardware.  That had totally slipped my mind but it sounds like that aspect is covered which is great.  So that leaves the z80.  The tough part is Cromix requires the TMS5501 which is available but only from gray market sources.  I think a CPLD or FPGA core for that would do the trick.  The rest is all bread and butter parts so the entire thing could be one S100 board.  Or three or four RC2014 boards.

Do those 2048Z boards use a second bus for the 32-bit transfers?

Price wise...it's hard to justify $500 for a hobby board.  $100 would be reasonable.  But I've never had to test that since the DPUs never seem to come up at least when I'm looking. :-)  I just miss the days we could pick up any S100 board for $30 to $50.  Luckily I grabbed some Blitz Bus and Z80 board sets in those days along with the Z2D (although it has an OEM sticker over the face...it was a weather station color graphic machine).

Thanks,

Amardeep

[Amardeep Chana]

Refund came today so this story arc comes to a close.  Just out $30 in round trip shipping so not terrible.  I used to check if manuals exist before bidding on hardware.  Going forward I'll be checking revisions and other details as well.  Lesson learned!

[Mike Stein]

Excellent!

Let's chat off-list; I might have a DPU for you if we can agree on a price.

I'd love to just give this stuff away to fellow enthusiasts (and have
done in the past) but now I'm retired and on a meager fixed income;
with this %$@ inflation times are starting to get a little tough...

m

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[Peter Higgins]

On Friday, November 24, 2023 at 2:07:09 PM UTC-8 Amardeep Chana wrote:

Do those 2048Z boards use a second bus for the 32-bit transfers?

32 bit transfers were implemented on the S100 bus alone using a combination of an XXU processor board and a 2048KZ. A 32 bit transfer was accomplished with use of two 16 bit transfers performed using a couple of additional S100 bus handshaking signals (not part of the IEEE696 standard) and two non-standard S100 bus cycles under the control of a state machine on the XXU board. This allowed data transfers on an S100 bus faster and more efficiently than what would normally be possible using standard S100 bus read and write cycles.

With regard to a speed comparison between 68K Cromix running on Cromemco's fastest "32 bit" system (using the XXU with a 16MHz 68020) and Damian Wildie's implementation of 68K Cromix on the S100Computers.com board set (using a 10MHz 68030) ... unknown.  In this discussion on the S100 Google Groups forum, Damian posted his Dhrystone score for his S100 system with the 68030's internal instruction and data caches enabled:

https://groups.google.com/g/s100computers/c/zltFK3u6ozY/m/764eHvmEAwAJ

[Damian Wildie]

Mike's 16.7MHz 68020 XXU achieved a Dhrystone score of 1961 , compared to 1119 for my 68030 system running 68010 Cromix+.

---- On Sun, 26 Nov 2023 13:52:33 +1000 Peter Higgins <higgin...@gmail.com> wrote ---

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[Amardeep Chana]

On Saturday, November 25, 2023 at 10:52:33 PM UTC-5 Peter Higgins wrote:

On Friday, November 24, 2023 at 2:07:09 PM UTC-8 Amardeep Chana wrote:

Do those 2048Z boards use a second bus for the 32-bit transfers?

32 bit transfers were implemented on the S100 bus alone using a combination of an XXU processor board and a 2048KZ. A 32 bit transfer was accomplished with use of two 16 bit transfers performed using a couple of additional S100 bus handshaking signals (not part of the IEEE696 standard) and two non-standard S100 bus cycles under the control of a state machine on the XXU board. This allowed data transfers on an S100 bus faster and more efficiently than what would normally be possible using standard S100 bus read and write cycles.

 Thank you, that clears up the questions I had about that.

[Amardeep Chana]

On Sunday, November 26, 2023 at 2:47:03 AM UTC-5 Damian Wildie wrote:

Mike's 16.7MHz 68020 XXU achieved a Dhrystone score of 1961 , compared to 1119 for my 68030 system running 68010 Cromix+.

Hello Damian,

I just read your original thread announcing the Cromix on the 68030 system.  So you were able to write block device drivers in C or the storage cards.  That's great news.  I have been wanting to write a block driver for Z80 Cromix 11 but never found good documentation or an example driver.  There is some information on character drivers but nothing on block devices.  On that platform drivers were generally written in assembly language.

My question is how did you go about learning to write the driver for 68K Cromix?  Do they have example driver source or written documentation on the framework?

Also, I saw the original thread ended with John's message about updating the serial board.  Did you ever complete and release the 68K Cromix and instructions?

Thanks,

Amardeep

 

[Peter Higgins]

The S100 Computers.com serial board was updated to version 4.2 to accomodate Damian's implementation of 68K Cromix - details on those updates were provided here:

http://www.s100computers.com/My%20System%20Pages/Serial%20IO%20Board/Serial%20IO%20Board.htm

Damian's implementation of 68K Cromix on the S100computers board set, including all the software and installation instructions, are provided here:

https://github.com/dwildie/cromix-s100computers

There are a few of us in addition to Damian (myself included) who have this up and running. I'd say it is an "advanced" hobbyist project since it requires skill to assemble the required 16MB RAM board (which uses SMD RAM chips), and equipment to program the GAL and CPLD (for the 68030 CPU board) and the PIC chip (to replace the now obsolete ELM440 timer for the Serial I/O board).

[Mike Stein]

Does anyone know what the difference is between the Cromemco 64KZ and
64KZ-II boards?

TIA

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[Peter Higgins]

On Wednesday, November 29, 2023 at 7:59:08 AM UTC-8 mhs....@gmail.com wrote:

Does anyone know what the difference is between the Cromemco 64KZ and
64KZ-II boards?

This is the explanation provided in the 64KZ-II manual addendum:

The 64KZ-II is a direct replacement for the 64KZ board. The difference between the boards is the way in which the functions are implemented by the hardware circuits. DMA manipulation is no longer used. Memory disable, along with the ability to disable each 16K memory array manually, is included. As shown on the new block diagram, Figure C, the timing shift registers, refresh counter, address latches, and RAS/CAS logic functions are combined into one LSI microcircuit. This reduces the power consumption while increasing the reliability of the board. All memory data passes through the data bus internally to the 64KZ-II board. Incoming data from the system DO bus is latched and held on the internal data bus. Then the incoming data is stored at the addressed memory location. Outgoing data from an addressed memory location is placed on the internal data bus. Then the outgoing data is latched onto the system DI data bus.

The addendum also indicated that that compared to the 64KZ, the 64KZ-II no longer supported the 8080 CPU and no longer supported DMA.

 

[Mike Stein]

Interesting; thanks.

I wonder whether all of that applies to the Rev B Boards with two
chips instead of the one LSI chip; all the available documentation
seems to apply to the D or later revisions (not sure where a Rev C
belongs, if they exist).

Probably not very relevant since the Rev B on eBay that's done so much
travelling is the only one I've ever seen.

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[Steven Feinsmith]

My knowledge about revision B (which could be an earlier version) that uses:

The revision B board uses Motorola MC3480P,      Memory Interface, and Control

                                           Motorola MC3242AP,   14-Line to 1-Line Multiplexer Inverted Output

The later revision board uses a single AMD 2964B Dynamic Memory Controller

I needed clarification from another person stating the newer revision boards no longer used DMA. It seems untrue because AMD 2964B is DMA used in revision C and later. I shrugged to search on revision B for the schematic and document, but I could not find one. One important thing to understand about dynamic memory boards is that they require a delay line module. That is why an eBay seller tried to sell the board as missing a delay line module. It is no longer available in the market nowadays.

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[damian]

Hello Amardeep

As per Peters comment, the source and instructions are in the github repository.  This is the block device driver for the IDE/CF card:  

https://github.com/dwildie/cromix-s100computers/blob/main/file-system/root/usr/drivers/idecf.c

This idecf driver uses low level block routines in the 68030 board's ROM.  

I also have an standalone version which works on the Cromemco DPU board.  It is not bootable, I boot from a floppy/gotek and mount the root filesystem from the IDE/CF card.

I found source code for several versions of the Cromix Plus driver library in In Marcus' github repository, I recall seeing Z80 source as well.

https://github.com/cromemcos/m/tree/main/cromemco/sourcecode/cromix/31.51

I found this document useful:  https://github.com/cromemcos/m/blob/main/cromemco/sourcecode/cromix/40.40%20Drivers%20boot/doc/drivers.doc

Damian

[damian]

There is now a build of the 68030 monitor which works with 4MB of RAM.  This has been tested using the s100computers.com 4MB RAM board in place of the 16MB board.  No changes to cromix+ are needed.

If anybody would like a copy let me know.

[Peter Higgins]

Steven - I quoted the phrase "DMA manipulation is no longer used" directly from the 64KZ-II manual addendum. I think that phrase was poorly written, and what they really meant to say was "The 64KZ-II does not support DMA on the S100 bus". If so this is not surprising, since supporting asynchronous DMA transfers with a DRAM board on the S100 bus was something that I don't think any manufacturer was ever able to make work reliably, despite a few claims to the contrary.

[Amardeep Chana]

On Wednesday, November 29, 2023 at 4:34:09 PM UTC-5 damian wrote:

Hello Amardeep

As per Peters comment, the source and instructions are in the github repository.  This is the block device driver for the IDE/CF card:  

https://github.com/dwildie/cromix-s100computers/blob/main/file-system/root/usr/drivers/idecf.c

This idecf driver uses low level block routines in the 68030 board's ROM.  

I also have an standalone version which works on the Cromemco DPU board.  It is not bootable, I boot from a floppy/gotek and mount the root filesystem from the IDE/CF card.

I found source code for several versions of the Cromix Plus driver library in In Marcus' github repository, I recall seeing Z80 source as well.

https://github.com/cromemcos/m/tree/main/cromemco/sourcecode/cromix/31.51

I found this document useful:  https://github.com/cromemcos/m/blob/main/cromemco/sourcecode/cromix/40.40%20Drivers%20boot/doc/drivers.doc

Damian

Hello Damian,

Thank you for the pointers. That is very helpful. I might be able to glean enough information from the z80 IMI and FDC driver source files to write a a block driver for 11.27.  Even the Cromix Plus docs should provide some hints as to what they were expecting in the older OS.

Kind regards,

Amardeep

[Amardeep Chana]

On Wednesday, November 29, 2023 at 10:43:25 AM UTC-5 Peter Higgins wrote:

The S100 Computers.com serial board was updated to version 4.2 to accomodate Damian's implementation of 68K Cromix - details on those updates were provided here:

http://www.s100computers.com/My%20System%20Pages/Serial%20IO%20Board/Serial%20IO%20Board.htm

Damian's implementation of 68K Cromix on the S100computers board set, including all the software and installation instructions, are provided here:

https://github.com/dwildie/cromix-s100computers

There are a few of us in addition to Damian (myself included) who have this up and running. I'd say it is an "advanced" hobbyist project since it requires skill to assemble the required 16MB RAM board (which uses SMD RAM chips), and equipment to program the GAL and CPLD (for the 68030 CPU board) and the PIC chip (to replace the now obsolete ELM440 timer for the Serial I/O board).

Hello Peter,

Thanks for the summary of where things ended up.  I'll be getting a DPU soon but will still need a memory board for it.  I assume the 16MB would work with a DPU?  It sounds like Damian's IDE driver solves the storage problem for the 68K side.  It's been probably ten years since I last played with my Cromemco stuff so it's great to see things have advanced so much.

Best regards,

Amardeep

[Peter Higgins]

68K Cromix running on the DPU uses a flat memory model so yes, the 16MB board will work in that setup.

Not sure what your plans are going forward. It sounds like you are considering running a system with the Cromemco DPU, the 16MB RAM board, perhaps a Cromemco I/O board,  and writing a modified version of the 68K Cromix driver software for Damian's IDE board so that it can work with that set of boards and 68K Cromix?

[Amardeep Chana]

On Thursday, November 30, 2023 at 12:15:53 PM UTC-5 Peter Higgins wrote:

68K Cromix running on the DPU uses a flat memory model so yes, the 16MB board will work in that setup.

Not sure what your plans are going forward. It sounds like you are considering running a system with the Cromemco DPU, the 16MB RAM board, perhaps a Cromemco I/O board,  and writing a modified version of the 68K Cromix driver software for Damian's IDE board so that it can work with that set of boards and 68K Cromix?

That sure sounds like where I was heading but I hadn't spelled it out so succinctly!  Truly there have been many twists and turns in my recent thinking as I learn about new developments so I hadn't fully settled down on a plan.  Originally it started when I grabbed that ill-fated 64KZ-II so I could get a round 256K in my Z2-D.  Currently it's equipped with a ZPU, TU-ART, 16FDC, and three 64KZ boards.

Then Mike suggested and offered a DPU so I started thinking about going down that road.  I have a Macrotech 1MB card but the manual says a factory modification is required to work reliably in a Cromemco environment without any hints what the mod fixes.  So I'll need a 68K memory board that can coexist with the z80 memory boards.  I assume that's done by setting the base address of the 68K memory to 10000h ?

So if I pick up the 16MB and IDE boards the system should be able to run Cromix+ on a hard drive...which is great.  Then if I can figure out how to write a block driver for 11.27 I can have the z80 side run the hard disk, too.  But once Cromix+ is running maybe that's not so important any more.

At any rate all this is very exciting!  I had given up years ago when all my scrounging around yielded no obvious way to write a block driver for Cromix 11. I knew it was possible as Pacific Datanet did it for their Vision/20 hard drive which I ran back in the day.

Thanks,

Amardeep

[Damian Wildie]

My DPU based system is:

• Cromemco DPU
  
• Cromemco 64FDC
  
• s100computers.com 4MB memory board
  
• s100computers.com IDE/CF board
  

The s100computers.com 16MB memory board cannot be used without modification for the PHANTOM signal.  On the 4MB board it is jumper configurable.

I recall a previous group discussion on this topic.

Damian

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[Damian Wildie]

Amardeep

I use an emulator for my initial Cromix Plus driver development:  https://github.com/dwildie/cromix-emu

This is a utility for manipulating Cromix, Z80 & 68K, filesystem images: https://github.com/dwildie/cromix-fs

Damian

---- On Fri, 01 Dec 2023 02:49:57 +1000 Amardeep Chana <asc...@gmail.com> wrote ---

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[Amardeep Chana]

On Thursday, November 30, 2023 at 4:42:08 PM UTC-5 damian wrote:

Amardeep

I use an emulator for my initial Cromix Plus driver development:  https://github.com/dwildie/cromix-emu

This is a utility for manipulating Cromix, Z80 & 68K, filesystem images: https://github.com/dwildie/cromix-fs

Damian

Those look extremely useful!  But I looked in the cromix-emu repo and there doesn't seem to be a complete set of files.  Just the README.md, LICENSE, and emu-boot.png files.  Where are the .jar and .yaml files found?

[Damian Wildie]

On the right hand side of the repo's landing page there is a Releases link:  https://github.com/dwildie/cromix-emu/releases

Download the zip.

---- On Fri, 01 Dec 2023 10:38:42 +1000 Amardeep Chana <asc...@gmail.com> wrote ---

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[Mike Stein]

Damian, do your drivers make it possible to just add an IDE/CF card in
a standard Cromemco system without any other changes and, if so, with
which versions of Cromix (Z80, series 20 (early 68K, DPU), series 30
(later 68000/010, DPU & XPU) or 40 series (68020, XXU) ?

Can it coexist with a WDI-II or STDC HD controller?

TIA

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[Damian Wildie]

Hello Mike

Yes, that is the idea. You should be able to add the IDE/CF board and driver to an existing Cromemco system.

I am only able to test with a DPU and 64FDC system but there is no reason it cannot co-exist with the STDC and WDI-II controllers. 

I believe the 30 & 40 systems shared a common code base, so it should be possible to compile the driver on an XXU based system.

Damian

---- On Fri, 01 Dec 2023 13:05:13 +1000 Mike Stein <mhs....@gmail.com> wrote ---

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[Mike Stein]

Thanks for the reply (and your remarkable achievements ;-) )

So, although probably a little slower, the IDE/CF board sounds like a
feasible replacement for the STDC ST-412 MFM controller, which is
becoming relatively rare. There are emulators for the drives, but not
for the controllers AFAIK.

m

[Damian Wildie]

I am hoping that the work to disassemble RDOS will produce a code base that can be modified to allow direct booting from the IDE/CF board.

I re-setup my Cromemco boards, didn't realise it had been almost a year since I worked on this. 

This is the console output (still has some debug) when booting from the gotek attached to the 64FDC and using the Cromix filesystem on the first MBR partition on the CF card in slot A of a IDE/CF card as the root device:

Welcome to minicom 2.8

OPTIONS: I18n

Compiled on Jan 19 2023, 00:00:00.

Port /dev/ttyUSB0, 09:18:12

Press CTRL-A Z for help on special keys

�

Bank 0 > 0 1 2 3 4 5 6 7 8 9 A B C D E F

         ^ ^ ^ ^ ^ ^ ^ ^ X X X X X X X X

Preparing to boot, ESC to abort

Standby

Address: Memory test by 16K blocks

000000h: ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

100000h: ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++

idecf init(12,1)

initDrive(A)

initDrive(A), drive ready

initDrive(B)

initDrive(B), drive ready

ideInitialise() = 0xb

IDE/CF Drives:

Drive A   Start      Size       Type

    [12,0] 0x00000800 0x0004b001 Cromix (ST)

    [12,1] 0x0004c000 0x0004b001 Cromix (ST)

    [12,2] 0x00097800 0x0004b001 Cromix (ST)

    [12,3] 0x000e3000 0x00015cd0 CP/M

Drive B   Start      Size       Type

    [12,4] 0x00000800 0x00032000 W95 FAT32 (LBA)

    [12,5] 0x00032800 0x00032000 W95 FAT32 (LBA)

    [12,6] 0x00064800 0x00032000 W95 FAT32 (LBA)

    [12,7] 0x00096800 0x000624d0 W95 FAT32 (LBA)

Floppy = 1, STDC = 6, ESDC = 11

Enter major root device number: 12

Enter minor root device number: 0

idecf open(0xc00,0x1)

cylinders:      1225

sectors/track:  20

surfaces:       11

bytes/sector:   512

start cylinder: 1

68010 XPU 162   Cromix-Plus Operating System

Damian's IDE/CF Driver Development System

System initialization complete

        Saturday, December 31, 2022             7:01:01

DATE (mm/dd/yy): 12/02/123

TIME (hh:mm:ss): 09:13

        Saturday, December 2, 2023             9:13:00

Hello world

If you have reset the computer, immediately execute "check -s".

XPU Cromix-Plus release 162

The message from /etc/welcome:  Welcome to the Cromix-Plus Operating System

Login: system

Logged in system Dec-02-2023 09:13:06 on tty1

Message of the day:  Welcome to the Cromix-Plus Operating System

Thought for the moment:

September is the turning point - the time that takes us home.

                                                Rod McKuen

system[1] ls -al /

Directory: /

        103 D  1   rewa re-- re-- bin         Oct-09  1987  bin

         19 D  1   rewa re-- re-- bin         Oct-09  1987  cmd

    112,608    1   rewa ---- ---- bin         Dec-30  2022  cromix.sys

        132 D  1   rewa re-- re-- bin         Oct-09  1987  dev

          8 D  1   rewa re-- re-- bin         Oct-09  1987  equ

         49 D  1   rewa re-- re-- bin         Oct-09  1987  etc

          0    1   rewa re-- re-- system      May-16  2020  floppy

         16 D  1   rewa re-- re-- bin         Oct-09  1987  gen

          0    1   rewa re-- re-- system      Dec-22  2020  ide

          0 D  1   rewa re-- re-- system      Nov-21  1997  tmp

         14 D  1   rewa re-- re-- bin         Oct-09  1987  usr

    102,612    1   rewa ---- ---- bin         May-15  2021  v.sys

system[2]

---- On Sat, 02 Dec 2023 00:52:48 +1000 Mike Stein <mhs....@gmail.com> wrote ---

[Amardeep Chana]

We could probably modify the board easily to expand the size of the RDOS memory.  Starting at C000H means it can be a full 16KB if needed.

[Mike Stein]

There are some old disassemblies of RDOS around and someone
(Null-pointer) was working on a disassembly of RDOS 3.12; don't know
if it was finished.

[null-pointer]

Hi Mike and Amardeep;

I’m not “finished” but making good progress, just off and on. Since we’re on this thread, a couple things. First off, here is where I am at with the project, and I hope this helps:

https://www.dropbox.com/scl/fi/0ojx9r32k7l31x5o0kli3/For_Mike_and_Ambardeep.asm?rlkey=q7paxiu665etfy49z3twy4vli&dl=0

Feel free to snag that. I’m planning on continuing along over the break (I’m a teacher) but if this answers some questions for now that’s great. Speaking of questions. I have some I was going to post to the group as my list got longer, but since we’re “here”, maybe somebody can help me a bit.

1) There is code in RDOS that does an “in” from 0x44. It reads as 0xff. The simulator code says this is “io_trap_in” and returns 0xff, so that’s right. But any idea why they might have done this? Is there some old device that was at 44h that we don’t know about?

2) I’m going from z80pack 1.37 and there’s no HDD in the code, so no way to get that part further along. Is that in 1.38 and if so is that on Git (I don’t see it - private)? 

3) I’ve implemented a debugger into cromemcosim / 1.37 and may post that some day. Breakpoints, memory dump, etc. to help the reverse engineering. Any interest? 

Also interesting is that the documents say that certain commands are no longer supported. But they are! Still in the code, still work. Q, Z, A, etc.

Bill (null-pointer)

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[Roger Hanscom]

Hi Bill,

>> 1) There is code in RDOS that does an “in” from 0x44. It reads as 0xff. The simulator code says this is “io_trap_in”

>>  and returns 0xff, so that’s right. But any idea why they might have done this? Is there some old device that was at

>>  44h that we don’t know about?

There is no I/O to/from port 44H in RDOS 2.52, so I doubt that any "old device" like that exists.  I'm assuming that 2.52 would cover all legacy hardware (excluding hard drives)?

Sorry ... no help on your other questions.

Roger

[Damian Wildie]

0x44 is possibly a MCU port

---- On Mon, 04 Dec 2023 06:28:04 +1000 null-pointer <null-p...@cox.net> wrote ---

[Mike Stein]

I believe ports 44H through 4FH are the MCU control & status registers.

m

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[Mike Stein]

You beat me to it ;-)

Interesting that that (old) chart shows it overlapping the SMD controller; the MCU manual shows 48H through 4FH used by a second and third MCU.

To view this discussion on the web visit https://groups.google.com/d/msgid/cromemco/18c323436b1.11399b72558085.4360783086277879566%40wildie.com.

[Mike Stein]

Here's another more detailed chart, but it also shows 48H to 4FH assigned to the SMD drive controller.

.

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[Damian Wildie]

Just...

That chart is from a 20/04/1983 application note.  Is there a newer version?

---- On Mon, 04 Dec 2023 10:50:05 +1000 Mike Stein <mhs....@gmail.com> wrote ---

You beat me to it ;-)

Interesting that that (old) chart shows it overlapping the SMD controller; the MCU manual shows 48H through 4FH used by a second and third MCU.

On Sun, Dec 3, 2023 at 7:24 PM Damian Wildie <dam...@wildie.com> wrote:

0x44 is possibly a MCU port

---- On Mon, 04 Dec 2023 06:28:04 +1000 null-pointer <null-p...@cox.net> wrote ---

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[Mike Stein]

Not that I know of, but the MCU manual is dated 1 1/2 years later,
September 1984; maybe there could not be more than one of the early
MCUs in a system, or maybe you just had to live with being limited to
one when there was an SMD drive installed. In my experience those
weren't very common anyway, especially once the STDC arrived on the
scene.

[Mike Stein]

As a matter of fact the May/83 68000 Board Manual does indeed only
list one MCU, using ports 44H through 47H; by Sep/84 they're talking
about up to three, so it looks like they did add the optional other
two later, displacing the SMD controller.

[9 TA]

 

Vào Th 2, 20 thg 11, 2023 lúc 12:28 Amardeep Chana <asc...@gmail.com> đã viết:

It seems this is an older generation revision than the common documentation.   It says LEGEND REV B at the lower right of the silkscreen whereas the manual and schematics cover the LEGEND REV E which is printed near the top of the newer board.

On Monday, November 20, 2023 at 12:02:25 AM UTC-5 Amardeep Chana wrote:

Hi Everyone,

I just purchased a 64KZ-II board and was surprised that it doesn't match the board described in the common user manual that is available.  It turns out that it's a Rev B of the board and they've replaced the big 40 pin AMD chip with two smaller Motorola chips as well as rearranged quite a bit of the layout.  I assume the switch settings are still the same. The problem is it is missing an IC from a 16-pin socket. I can see the silk screen underneath it says "DELAY" so it might be a digital or analog delay line of some sort.  But without the updated manual and/or schematic I don't really know how to repair this.  Does anyone have a copy of the updated docs for it?  Attached is a photo of the board for reference.

Thanks for any help!

Regards,

Amardeep

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[Mike Stein]

Turns out that the May/83 68000 Board Manual does indeed only mention
a single MCU at port addresses 44H through 47H. Looks like in the next
year or so they added the capability to have up to three boards and
shared the SMB controller ports.

[null-pointer]

Some follow-up notes/thoughts. Earlier I had a question (#3 below) about “where is the hard drive simulation code”. I should have been more specific - there is currently no code in cromemcosim / iodevices to cover the STDC, correct? RDOS 3.12 wants to talk to it over port 0f8h but there’s nothing there in the simulation. So on a related note, I went searching for documentation along the lines of what is available for the 4FDC or the 16FDC, etc. Those documents are quite detailed and list all the ports and all the commands. The only doc I can find on the STDC is the one in the repo, that has none of those details. It’s mainly a “here is how you plug it in” document. I could see myself some day contributing C code to implement the board, but not if there’s no way to know how it is supposed to work...

So! Anyone know of any additional documentation for the other drive controller?

Bill

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[damian]

I have never found any detailed documentation for the STDC.

Attached is my implementation of an STDC emulation written in Java which has sufficient functionality for Cromix Plus.  

You are welcome to use this to implement functionality for cromemcosim on the condition that any published, derived code is appropriately attributed.

[null-pointer]

Damian;

Thanks! Your IOBlock.java matches something in RDOS0312 that now makes perfect sense. I could NOT figure out how a loop, waiting for the STDC status, would ever complete. The RDOS code loops waiting for a byte at 0043h to change. But nothing in the assembly ever writes to it. And interrupts are always off in RDOS. From reverse engineering the assembly it was becoming clear that they build a structure at 002eh with disk information. The offset to the status according to your Java code is 15h. The loop is waiting for the byte at 0043h to change. 002eh+0015h is … ! This now makes perfect sense, the controller changes it, writing the status.

Bill

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<stdc.zip>

[null-pointer]

Oh! Thanks Damian! I’ll take a look. This’ll help a lot for the RDOS 3.12 and then if I have more energy I’ll see about writing this in C and getting it going. This way I can do one than the other instead of both at the same time.

Bill

On Dec 13, 2023, at 4:32 PM, damian <dam...@wildie.com> wrote:

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<stdc.zip>

[null-pointer]

Hi Damian and others;

Nearing the end of my reverse engineering the RDOS 3.12 code. One thing that is left is that there are many sections of assembly that don’t seem to be used. Remnants from … somewhere. Back when dinosaurs roamed maybe. So I thought I would put together a list of every command I know of, set my debugger to stop if we’re within range of some of this “dead code”, and then run every command I’m aware of.

Which caused me to make a list of all the commands I -think- are in the ROM. The list is here:

https://www.dropbox.com/scl/fi/tlg2dnqfuprf5acz27gd6/All-the-RDOS-3.12-Commands-I-can-Find.pdf?rlkey=mswsqjk9gwhojdcbpod2s17hh&dl=0

If anyone knows of anything I am missing shoot me a note. 

Thanks!

Bill

[null-pointer]

Hey Cromemco fans. My nice Fall sabbatical is over and I’m back to the regular schedule for my Spring semester. So I want to push the reverse engineered RDOS 3.12 out to everyone. It’s fairly complete although there’s some areas I just never got to. But it ought to be far enough that if someone wants to make changes for a specific reason it ought to get you there.

But. Any official procedure for “releasing” this? Pull request (which requires me to learn how)? Just put it in the repository with an obvious name? 

Thanks! This was quite enjoyable.

Bill

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[Damian Wildie]

Thanks Bill, have you been able to reassemble the source?

A pull request would be the standard git mechanism to add to the repository.

Damian

---- On Tue, 06 Feb 2024 03:57:47 +1000 null-pointer <null-p...@cox.net> wrote ---

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[null-pointer]

Yes, what I have been doing in my Makefile as I go along is to reassemble, dump the binary in hex, and diff-ing it with a hex dump of the original to make sure it is byte-for-byte identical. I’ll shoot off a pull request in the next day or so. I tend to use “git” only for ME, as a backup, so let me make sure I do the right thing. 

This group/activity actually made it to my "sabbatical report” I had to turn in a couple weeks back. You’re all famous now. 

[null-pointer]

Thanks again Damian; there’s “rdos0312_new.asm” in the repository under code/operating systems/RDOS/03.12. Assembles with the assembler with z80pack and the output is  identical. Hope somebody can use it.

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[cro memcos]

So well,  what I know about github can be written on the back of a very small cigarette packet,  but I looked and did not find that source file

If you send it to me I can definitely add it in else,  according to me it's not there yet ??

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[William Mahoney]

Apparently your very small cigarette packet is bigger than MY very small cigarette packet. (Not sure what happened there, I forked “main”, added it, did a “pull” … So this time I just uploaded it, plain and simple.)

On Feb 8, 2024, at 4:38 AM, cro memcos <crom...@gmail.com> wrote:

Caution: Non-NU Email

So well,  what I know about github can be written on the back of a very small cigarette packet,  but I looked and did not find that source file

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[Damian Wildie]

Forking was the wrong operation for what you were trying to achieve.  

The normal git way would be:

1. Clone the repository to create a local replica.
   
2. Create and checkout a branch in the local repo
   
3. Make changes and commit to your branch
   
4. Repeat item 3 as many times as necessary
   
5. Push your local branch to the remote github repository
   
6. Create a pull request in github from yuour branch to main
   
7. The repo owner (Marcus) would review and, if acceptable, merge the pull request.
   

---- On Fri, 09 Feb 2024 03:32:30 +1000 'William Mahoney' via Cromemco <crom...@googlegroups.com> wrote ---

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[William Mahoney]

Thanks Damian - the issue was #1, I could never manage to get the entire thing cloned. Not sure if it was network issues or what but it’d work away for maybe 15 minutes and then fail. My alternative route was a different approach which apparently was a bad idea. 

On Feb 8, 2024, at 4:23 PM, Damian Wildie <dam...@wildie.com> wrote:

Caution: Non-NU Email

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