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1. U2 is the 28C256 which is a 24 pin 0.6in device. The device on the board looks like a 0.3in device.
2. Maybe I missed the chat, but is U9 an SMD LS244 rather than HCT244?
3. I couldn't see the pads for the optional diode from pRESET to U45-1.
4. I am probably jumping the gun but I suggest that the trace to J2-41/42 is kept separate from the TTL +5V supply and is taken directly from the Pololu.
5. I suggest that U48's tab is connected to a reasonable area of copper to act as a heat sink. I would guess half a square inch should suffice but be careful as the tab on the regulator is connected the the powerful +16V rail.
6. As is common practice, I suggest using thick ground traces and add in areas of grounded copper where you can.
On Monday, 28 July 2025 at 03:51:52 UTC+1 Aron Hoekstra wrote:
Just wanted to get some feedback on the board layout as I have it so far.. haven't placed the resistors/caps yet or done any traces yet - but let me know how this is looking?
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1. The optional diode between S100 pRESET and U45-1 (not yet added to the schematic) should probably be something cheap like a BAT41 or BAT42. A Schottky diode will be better than a 1N4148 due to its lower forward voltage.
2. IDE pin 21 (DMARQ) should go to ground via 5k6 not +V. Likewise, INTRQ should go to ground via 10k not +V.
3. You may need to check the data sheet for the 3.3V regulator (U50) because they normally need a decoupling capacitor at the input to keep them stable. Also, check the recommended value for the output capacitor. I do not have the part number otherwise I would have done it for you.
4. U45-12 (-RESET in processor circuit) appears to be connected to the clock line when it should be separate.
5. U46 (S-P circuit) does not appear to have its supplies connected.
6. In S-P circuit, U36-14 should go to +5V and U37-14 should go to +5V. U36-7 and U37-7 do not appear to be connected to ground.
7. C72 & C73 appear to be the wrong way round (reverse polarity).
On Monday, 28 July 2025 at 03:51:52 UTC+1 Aron Hoekstra wrote:
Just wanted to get some feedback on the board layout as I have it so far.. haven't placed the resistors/caps yet or done any traces yet - but let me know how this is looking?
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I'm also in.
Richard M
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Hi Aron,
Please add Me to Your list for one board.
Thanks,
Mark H
From: crom...@googlegroups.com <crom...@googlegroups.com>
On Behalf Of Aron Hoekstra
Sent: Wednesday, August 13, 2025 7:32 PM
To: crom...@googlegroups.com
Subject: Re: WDi to IDE adaptor (3)
Well ok, I'll go ahead and proceed and we'll collectively have to eat these extra costs. One thing I hadn't realized is that 6-layer PCBs are tariffed higher than 2 or 4 layer PCBs! I have to get a few more components sorted out so cost will go up a bit more, plus there's shipping to consider.
I have to order in multiples of 5's, and so far have 6 claimed.. so I'll need to order at least 10 - I can't recall who else may have said they wanted one. Is anyone else interested?
Aron H - 1
Mike A - 1
Peter H - 2
Jay C - 1
Richard M - 1
On Wed, Aug 13, 2025 at 3:52 PM Richard Muse <rlm...@gmail.com> wrote:
I'm also in.
Richard M
On 8/13/25 12:28, Jay Cotton wrote:
I'm in for one copy.
Tnx
Jc
On Wed, Aug 13, 2025, 8:19 AM Peter Higgins <higgin...@gmail.com> wrote:
Despite the steep duties and taxes... if you do decide to go ahead, I remain interested in buying a couple of these boards.
On Tuesday, August 12, 2025 at 8:58:41 PM UTC-7 Aron Hoekstra wrote:
Went to get a preliminary cost estimate (though we are now short a few parts that are now showing low/out of stock). Got through the estimate and on the checkout page, I got hit with this. As if I needed any more reason to absolutely loathe everything about Trump and his despicable cult following. As much as I want to get this board made, I refuse to hand over any cash directly into his coffers. He was in the news again just today about how the corporations pay the tariffs, not the American consumers (a well-known lie from day 1). Sorry, I don't mean to turn this into a political rant, I just haven't placed a PCB order yet since these tariffs went into effect.
Up until this the prices were pretty reasonable for 5 boards, about $70 for the 5 PCBs, and $180 for parts & assembly. so comes to just over $50 ea, considering the number of parts etc, not terrible. I know I said they'd probably be around $30 ea but that was before we added a bunch more SMD parts.
Mike, not sure what import duties might look like from your side of the pond?
Aron
On Mon, Aug 11, 2025 at 12:02 PM Aron Hoekstra <null...@gmail.com> wrote:
No rush or worries.. In the meantime when I have time, I'll go through a test order to make sure I have all the SMD/BOM parts export working so JLCPCB recognizes all the parts & placement correctly. We can still make changes, I just want to get the process down.. and get a pretty close cost estimate.
On Mon, Aug 11, 2025 at 11:59 AM 'Mike Arnold' via Cromemco <crom...@googlegroups.com> wrote:
Aron, looks like a masterpiece! I never realised that the design was such a challenge to lay out. Imagine if I had chosen a 16 bit processor!
I will look at it over the next few days but I am on quite a steep learning curve with Kicad.
Mike
On Monday, 11 August 2025 at 16:43:08 UTC+1 Aron Hoekstra wrote:
Yep, pretty much. I don't think it's really necessary though to verify each & every trace matches the schematic - there are tons of checks built into the software which takes care of that. If the schematic is done right, then the traces should be right. More just looking for feedback like on things I may have overlooked like "this component shouldn't be close to that one" or "why is this capacitor way over here??" or "are you nuts this trace carries 10 amps and you made it only 0.2mm wide!" :)
On Mon, Aug 11, 2025 at 10:24 AM Peter Higgins <higgin...@gmail.com> wrote:
Impressive!
Having never gotten to the stage of board design using Kicad I have to ask... does reviewing the routing basically come down to visually following each board trace to make sure it matches the schematic?
On Monday, August 11, 2025 at 8:02:02 AM UTC-7 Aron Hoekstra wrote:
Ok 6-layer autorouting was a success! I went through and fixed/cleared all DRC issues, remaining warnings are not a concern.
At this point I'd really like to get some eyes on the board in Kicad to do a review of the routing, etc - if you're willing?
Unfortunately I don't think it'd be possible to review in any detail using printouts/PDF?
- Download/Install Kicad 9.0: https://www.kicad.org/download/
- Download and extract the W2I-S100 project files: https://drive.google.com/file/d/1Kst2UWaEPm_NJZzu7-OqE2ak8XuMBSx0/view?usp=drive_link
- In the extracted folder, open the "W2I-S100.kicad_pro" file.
- From there, open the W2I-S100.kicad_sch to view the Schematic, open the W2I-S100.kicad_pcb to view the board.
- First time opening a schematic/board it'll pop up some questions, just accept the defaults and it'll take you in.
- If you accidentally drag/move something, don't worry. Either undo, or exit without saving changes and go back in.
- In the board editor it may be hard to view traces due to the ground plane - hit CTRL+B to "unfill" the plane, making things easier to see (but then it'll show GND components as unconnected). Hit "B" to refill it.
- Signal trace widths are 0.2mm. Most vias are 0.6/0.3mm.
- To view a connected net, select a single trace, then hit the ` key (tilde/backtick), and it'll highlight the whole net.
Let me know if you have any questions.
On Sat, Aug 9, 2025 at 10:17 PM Aron Hoekstra <null...@gmail.com> wrote:
So 2-layer routing failed miserably - it was worth a shot but left something like 200+ connections incomplete. We're going to have to make this a 4 or 6 layer board. Fortunately I have a coupon through JLCPCB which makes this option not much more expensive... will play with it some more
On Fri, Aug 8, 2025 at 5:57 PM Aron Hoekstra <null...@gmail.com> wrote:
Hey guys just a quick update - sorry been pretty slammed this week. But did manage to get all the passive components placed and some of the power traces. Going to keep working on those and then let the autorouter do its thing. Here's where things are at:
On Sat, Aug 2, 2025 at 4:59 AM 'Mike Arnold' via Cromemco <crom...@googlegroups.com> wrote:
I tried dropping the CPU clock speed from 13.5MHz to 10MHz but got lots of read errors. I don't know if that is a software or hardware thing. Unfortunately, I do not have the time to investigate at the moment.
On Saturday, 2 August 2025 at 09:13:44 UTC+1 Mike Arnold wrote:
Aron, those capacitors are fine. They have NP0 dielectric so they will not change their value too much with temperature.
Mike
On Saturday, 2 August 2025 at 03:47:48 UTC+1 Peter Higgins wrote:
Yes, making D3 something that would optionally be installed would be another way to do it.
On Friday, August 1, 2025 at 7:45:17 PM UTC-7 Aron Hoekstra wrote:
Ah ok I was going to leave the diode as a through-hole component which could be installed by the user if they want that feature. Would that also work?
Aron
On Fri, Aug 1, 2025, 8:51 PM Peter Higgins <higgin...@gmail.com> wrote:
Aron - please put a 2-pin jumper header between U45 pin 1 and the anode of D3, with no "default" trace between header pins. We want the default board configuration to not respond to the S100 /RESET signal, and make it an option (by installing a shunt on the header) to enable it.
On Friday, August 1, 2025 at 3:42:58 PM UTC-7 Aron Hoekstra wrote:
Hey Mike, here is the 470pF part: https://jlcpcb.com/partdetail/YAGEO-CC0603JRNPO8BN471/C519395
and here is the 47pF part: https://jlcpcb.com/partdetail/YAGEO-CC0603JRNPO8BN470/C519392
1. Does this work?
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I would like a second one. So 2 for me. If you get an even 10
from unique folks with only 1 for me then 1 will work. But I do
have 2 machines I'd like to use one in.
Richard M
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Is anyone else in Canada besides me?
Since it has come up. I have to agree regarding a first run. Of the several boards I have used from John Monahan (S100 Computers), all have been laid out with Kicad and are at least R2 if not later and they are all just 2 layer. Easier to test and patch.
I am following the discussion with great interest and desire to
utilize the board, but have to admit, most of this is way outside
of my wheelhouse. That said, it seems there are a number of
opportunities for necessary or at least desirable 'revisions' for
both basic function and reliability once a run of real boards is
produced and tested.
Sooo, I have to agree that a short run up front is a good strategy. I'm in the US and not sure what the tariff impact is, but I certainly want to participate whatever strategy is pursued.
Richard M
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