FPGA DAB modulator

[Sergiy]

Hi all!

After long time of development I finally have something to show.

That is DAB mode 1 modulator, which use FPGA for signal processing. It's similar to FX2->AD9957 modulator, but have Xilinx Spartan6 FPGA in-the-middle.

There is still some not very CPU-intensive pre-processing on software-side, which parses ETI and adds error-correction codes for FIC and CIF and then sends this pre-processed data to the device, which does other parts of the job.

I want to move all modilator's blocks into FPGA, but not sure if there would be enought space for it, so I decided to freeze version which I have rightnow and provide it as-is. Hope next version of the firmware will not need software pre-processing at all.

Here is explanation of the hardware-software: http://tipok.org.ua/node/44

It's also much more stable, comparing to FX2+AD9957 testing board that I described before. And most important: it does not have bug where I/Q samples been swapped sometimes. Optionally, this hardware may be used as I/Q samples player, just like USRP/HackRF. And it supports up to 6144 Ksamples per second (16-bit each).

All software/firmware source codes, schematics and pcb's are avaliable.

[Rash]

Congratulations!

Kind regards,

Rash.

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[Mathias Coinchon]

Hi Sergiy,

Congratulations for this great work !

We are currently testing the SFN functionality with the LEA-M8F module on the USRP B200. Matthias has adapted odr-dabmod and UHD to communicate with the GPS module via UHD (checking GPS fix). In particular, the handling of GPS signal loss is important to avoid destroying the SFN by sending out of sync.

How would you see the handling of SFN in your case ? If I understand correctly, ETI would be sent to your FPGA modulator and the PC would be used to receive via ZMQ and handle transmission errors, muting if necessary. Are you using a homebrew driver or do you use UHD for your board ?

Regards

Mathias

---

De : Sergiy <pir...@gmail.com>
À : crc-mm...@googlegroups.com
Envoyé le : Lundi 4 mai 2015 12h28
Objet : FPGA DAB modulator

[Sergiy]

Hi, Mathias,

If possible FPGA will handle errors and keep tracking of GPS sync. And will send pre-prcessed dab frame for transmission (which having it's timestamp) when it's time to start transmit it. If it would be too far from behind, FPGA will just ignore that frame and wait for the next one. Just like one of USRP's methods.

Actually there is no driver as-is. Only parts of very old USRP's code (libusb wrapper) which is included into the application's code and used as sink in the flowgraph of cutted version of ODR-DabMod (dab_blockpart).

[Peter Symonds]

Good news!!!

Will be able to support any Ethernet interfaces?

Pete

[Sergiy]

Yes, I'm planning to use ethernet interface, since we have ZeroMQ or EDI for transportation, but after error correction and ETI-parsing will be implemented on-board instead of software. Also i'm planning to use microblaze CPU, which can be used to remotely control of transmission and ethernet frames processing. But there is low amount of RAM, so complete design must fit hardware limitations.

[Matthias Brändli]

Congrats! I'm looking forward to reading more of your FPGA work !

mpb

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[Sergiy]

Hi, Peter.

Ethernet interface is now presented in latest version of the board: http://tipok.org.ua/node/46

Also, now whole modulation process is done inside FPGA. Just feed it by ETI-frames using TCP connection.

понеділок, 4 травня 2015 р. 16:52:37 UTC+3 користувач Peter Symonds написав:

[jhansen1]

Just ordered this from Sergiy and i am very eager to start testing. I think it has great potential.  

[Sergiy]

Hi all!

We did some measurements of EasyDABv2 during last months, the results of fighting with images and spures are publisher here: http://tipok.org.ua/node/49

Also there is resulting spectrum and R&S ETL and FSU's measurements are there too.

New firmware with source released today, but web-update process is not very stable, so it's recommended to have Xilinx JTAG programmer near.

The board's output power has been decreased to 45mW, but signal's quality has been enchanced.

More info about changes in firmware and board's design at ChangeLog of boarfd's page: http://tipok.org.ua/node/46

[RadioNeck]

Do you plan on adding USB support at all ?

[Sergiy]

Previous version of the board, so-called EasyDABv1 - is with USB-interface: http://tipok.org.ua/node/44

It's based on two boards: digital and analogue part.

PCB drawings is avaliable for download and DIY.

четвер, 3 березня 2016 р. 05:12:44 UTC+2 користувач RadioNeck написав:

[Jan de Vries]

My transmitter project , based on the  EasyDABv2 !

http://www.vcomm.nl/dab/

[Matthias Brändli]

Hey that's cool! I'm happy you were able to get a licence for this, and
are allowed to transmit DAB+ in Holland!

mpb

On 22/06/16 21:13, Jan de Vries wrote:
>
> My transmitter project , based on the EasyDABv2 !
>
> http://www.vcomm.nl/dab/
>

[Sergiy]

Hi Jan!

Glad to see that You are on-the-air!

I can recommend You to install helical band-pass filter between RA30H1721M and your output amplifier.

The design can be borrowed from 144MHz HAM filters, like this:

http://coil32.net/online-calculators/helical-resonator-bandpass-filter.html

This addition will make your transmitter output even more clear, without side-band frequencies and low-level sub-harmonics that are produced by the board.

[Jan de Vries]

Hi Sergiy
I sure wil make such a filter and give it a try, whows the progres on the SFN?

[Sergiy]

10MHz source - is not very good for current DAC, because it's badly divisable by 2048. So, now i'm used 125/32 fractional interpolator that takes lot of gates and i'm trying to use version that just skips 192 samples per 8192 to have 8000kS/s samplerate needed by the DAC (this will free gates that needed to NMEA to UTC time converter).

Also I already have 2 GPS receivers that locks to the satellites, but still fighting with this reference oscillator's small deviation that happens sometime, because this deviation then multiplied by PLL and high-frequency reference clock of the DAC - is varying much bigger than GPS clock. Not sure how to fix that. I'm thinking that this small deviation can be compensated by adding delay between transmitters by hands. Friedericke Mayer from the universitie of Hannover does great research of founding best delay value between DRM+ transmitters to enchance SFN, especially in the middle between transmitters:

https://www.ikt.uni-hannover.de/fileadmin/institut/Publikationen/IEEE_SFN_deckblatt.pdf
There is lot of formulas, still trying to understand it. But this is good start-point to understand best delay value for DAB as well.

I also added simple variable resistor and capacitor to the 1PPS line to fine-tune this pulse delay, so this schematic will add posibility to tune delay between transmitters.

середа, 6 липня 2016 р. 23:40:54 UTC+3 користувач Jan de Vries написав:

[Matthias Brändli]

I think you know already, but as a reminder: The u-blox LEA-M8F has a
30.72MHz REFCLK out, divide by 15 to get 2048kHz.

mpb

[Sergiy]

Hi Matthias,

Yes, this frequency - is much better to use.

i'm already waiting for this modules to be delivered, so i can try them as source for PLL and will be able to compare frequencies stability too.

вівторок, 12 липня 2016 р. 14:02:31 UTC+3 користувач Matthias Brändli написав:

[Jan de Vries]

A cheap but great amp for dab+ use .
http://dutchrfshop.nl/dab/150-300-watt-digital-analog-amplifier.html

[Gerard Lokhoff]

Hi Sergiy !

It took some time, and I had to wait some weeks due to illness, but last week I finally got to work on setting up a DAB service for Eindhoven, The Netherlands. And I thought I shouldn't start asking questions before I had made a good attempt to get things working. Well, I must say after 1,5 weekends I finally got things to work, and aim to document things so others will have an easier job getting started. So far so good.

And I must say, getting the EasyDab to work was indeed easy ;o) As you may remember I got 2 boards from you, one with software version 18.03.2016, the other with 10.10.2016. After Jan de Vries told me the 10.10.2016 version was much more stable I used that one, and I think everything is fine.

So I tried to update the 18.03.2016 board to version 05.01.2017... All seemed to go well until I got messages like the ones below:

Writing 0x08a000...

Writing 0x08b000...

Can't write data at 0x08b000, exit code is 6...

Writing 0x08c000...

Writing 0x08d000...

Writing 0x08e000...

Can't write data at 0x08e000, exit code is 6...

Writing 0x08f000...

Can't write data at 0x08f000, exit code is 6...

Sector erase 2 of 6 ...

Writing 0x090000...

Writing 0x091000...

It seems the upgrade didn't succeed, as the board doesn't seem to respond on the address I set it to (192.168.192.20) nor the default 192.168.2.4 ...
So I guess I'll have to find an alternative (like your suggestion JTAG or spi-flash programmer) ?
Or is there still a way to recover from this in a simple way ?

Thanks for any suggestion, and your work to make this possible !

Gerard

[Sergiy]

Hi Gerard,
Update procedute is sometimes can be faily, especially on older firmware.

if LED2 on the board which means "FPGA empty" is still ON after powering-up, then unfortunaly, You need JTAG or SPI-Flash programmer to revert FLASH to working condition.

But if LED2 is getting OFF after powering-on the board, then this means that board is running on backup firmware.

In this way, If You can't get ping reply from the board, then just do reset procedure (by connecting first and last pin's of X2 connector during 10 seconds when powered-up the board).

After reset is done, board will have IP: 192.168.1.2 netmask 255.255.255.0, and then You can run firmware upgrade once more.

неділя, 19 лютого 2017 р. 21:26:40 UTC+2 користувач Gerard Lokhoff написав:

[Gerard Lokhoff]

Hi Sergiy !

OK, thanks for the quick reply ! I'll check this evening whether or not LED2 stays on or not...
Am I the first one asking this ? As I couldn't find this information anywhere...
Actually it is good it happened: I'm planning to document these things, as a reference for others.

Gerard

[Sergiy]

Hi Gerard,

You are not the first. Peoples sometimes getting such replies with "Can't write data at ..." It's related to network condition, and I'm not sure that wget/curl like update is stable enought,

Maybe writing some tool that will re-send same data to the same address until success reply - will be good idea. That's why I warned about having JTAG or SPI flash programmer for such case.

 

But there is a hint: You can run update once more by decreasing network load or by reconnecting board directly to the PC (but without turning it off during this operations).

So the firmware that "lives in RAM" will still work and update is possible.

All new firmwares have this "backup firmware" that is located at beginning of the flash (address: 0x000000) and it runs if CRC checksum of "do-the-job" firmware (that is located at 0x080000) is incorrect.

You can open update_firmware.sh script and see that there is 2 segments with FPGA firmwares and one segment for HTTP/JavaScript pages. 

There is also one segment for configuration handling (at address 0x070000), but it keeps untouched during firmware update and updates only by web-interface, when [apply config] button pressed.

понеділок, 20 лютого 2017 р. 12:39:15 UTC+2 користувач Gerard Lokhoff написав:

[Gerard Lokhoff]

Hi Sergiy,

unfortunately the LED2 remains red after power up...

So I'll have to find a way to get the software into the device with JTAG. There should be someone able to help out here in Eindhoven ;O)
Any special instructions for that ?

It's a bit unfortunate this happened, especially since I used a router with just the PC and the EasyDAB board attached to it, and everything seemed to work until these error messages appeared...

Anyhow, thanks for you instructions so far !

[RACHIT AJITSARIA]

Hi.  I am a bit new to FPGA.  CAn you tell me how are you storing the http files in flash?  Are they being converted to mcs?  Also, how are you specifying the address for the FPGA bitstream, http files etc in your project?

[Sergiy]

Hi Rachit,

Webpages are stored in memory segment with address: 0x060000...0x070000. Web-UI folder contains files with a number, that number - is exact hexadecimal location where page or javascript must be stored. Each webpage/javascript must be null-terminated and it's size must be less than 7900 bytes. The script run_update.sh does the job: it transfers webpages to needed locations as well as update FPGA's firmware, You can simply comment webpage's update or firmware update at the end of that script.

The default address "/" is hardcoded to be 0x060000, where main webpage is located.

вівторок, 30 травня 2017 р. 08:38:04 UTC+3 користувач RACHIT AJITSARIA написав:

[RACHIT AJITSARIA]

Thank you, Sergiy.

So do we have to load only easydabv2_8192.bit file into the flash (after setting up the hardware and converting it to mcs). No separate mcs file for webpages? Is the bit file mentioned generated through the ISE project in your files directly?

[Sergiy]

The easiest way - is to Load .bit file to FPGA, and after that - to run web-update script: run_update.sh, so it will transfer .bit file and webpages into flash.

Itselve .bit file does not contain any webpages, but allows you to transfer files to flash. If flash is empty, the board boots with IP-address: 192.168.1.2/24, so You can change run_update.sh (at the beginning) to start transferring.

вівторок, 30 травня 2017 р. 11:55:43 UTC+3 користувач RACHIT AJITSARIA написав:

[RACHIT AJITSARIA]

Thanks a lot. This does seem to make the task at hand easy for me.

[Francesco Berti]

Hallo Sergiy, have you any update for easydab board? We are Testing two in sfn with good result.

[Sergiy]

Hi Francesco,

Rightnow i'm testing new board's design, which containing "handmade GPSDO", it does not require expensive GPS-receiver, due VC-TCXO is used as reference clock and it's controlling by PWM output from FPGA that counts frequency by using 1PPS pulses.

I also made testcase for EEP-B profile, but not yet found the reason of the problem.

вівторок, 30 травня 2017 р. 15:53:18 UTC+3 користувач Francesco Berti написав:

[Francesco Berti]

Good work, we will be happy to try it.
I will send you email next days regarding the set of delay and a strange behaviour.
See you Soon.

[Sergiy]

Here is web-update firmware if You wish to try:

http://tipok.org.ua/downloads/hardware/DAB-TX/Spartan6-FPGA/EasyDABv2/SFN/pcb_v5/easydabv2.6144-23.05.2017_sfn.tar.gz

It does not supports 10MHz reference source anymore and there must be fixed some "skipping 1PPS pulse" bug that i found.

вівторок, 30 травня 2017 р. 16:33:05 UTC+3 користувач Francesco Berti написав:

[Francesco Berti]

Yes sure I will try it and send you feedback.

[RACHIT AJITSARIA]

Hi Sergiy.

Uploading the bit (mcs file) and script should work even if I am implementing it from scratch?

Thanks.

[Francesco Berti]

Hallo Sergiy can I use this new firmware in an old board with gps lea-m8f?

[Sergiy]

By JTAG - yes, by http - no.

середа, 31 травня 2017 р. 12:42:06 UTC+3 користувач RACHIT AJITSARIA написав:

[Sergiy]

Yes, sure You can. Just disable flag "[ ] enable internal GPSDO" because You have external one (which is inside LEA-M8F).

середа, 31 травня 2017 р. 12:45:27 UTC+3 користувач Francesco Berti написав:

[RACHIT AJITSARIA]

Hi Sergiy.

So if I am implementing by scratch I can upload the .bit file by JTAG. Running the script "update_firmware.sh" won't load the dab.ui files? How can I load them into the flash then?

Thanks.

[Sergiy]

By creating flash image (which will contain .bit file and webpages). ANd You can upload this flash image by impact tool, which is able to program flash indirectly (throught fpga) by using JTAG interface.

середа, 31 травня 2017 р. 12:52:29 UTC+3 користувач RACHIT AJITSARIA написав:

[RACHIT AJITSARIA]

Hi Sergiy.

How can I convert the webpages to FLASH image file? I am using the Impact tool for indirect programming to convert the .bit to .mcs and program the Flash. But I was unable to find a similar way for the webfiles. Also, there was no option for selecting the address for .mcs file when using Impact. But the webpages have to be mapped into specific addresses.

Thanks.

[Sergiy]

Just download ready-made segment with webpages from flash and upload it again if You can't use impact to make it.

середа, 31 травня 2017 р. 14:17:14 UTC+3 користувач RACHIT AJITSARIA написав:

[RACHIT AJITSARIA]

Hi Sergiy.

Sorry, but I am still not clear how I can load the http files into the flash memory.  I am unable find any method of converting the webfiles into .mcs for JTAG (through Impact).  I did not get the ready made segments part.  If you are able to clarify or point me in the right direction, I would be grateful.

Thanks.

[Sergiy]

четвер, 1 червня 2017 р. 06:45:19 UTC+3 користувач RACHIT AJITSARIA написав:

Hi Sergiy.

Sorry, but I am still not clear how I can load the http files into the flash memory.

1). Edit "update_firmware.sh" script (by running text editor), set your board's IP-address

2). and run that script.

3). then connect JTAG and run impact.

4). In impact use any .mcs file as source for flash IC, and choose correct flash IC name.

5). Do not program flash IC

6). Run "Readback" and choose .mcs file to save flash IC's content.

Volia, You have new .mcs file with all content of flash IC.

As alternative way 1, You can just unsolder flash and read it after web-update has been finished.

[Francesco Berti]

Hi Sergiy I've tried your new firmware it works correctly with lea-m8f.
Thanks a lot.

[Francesco Berti]

Now the setting of delay is perfect with ms and us separate, in the previus version we have problem putting a value we reread a different number but the effective delay is the one we have write.

[RACHIT AJITSARIA]

Hi Sergiy.

Thanks for the help.  I was trying to compile your assembly program using the 'opbasm' assembler you had used.  It is showing the error 'ERROR: Address exceeds memory bounds: 400 <limit 3FF>
FLASH_routines.psm line 57 <expanded line 57>: LOAD s2, 02; PP instruction"

I am compiling your original file by the command "opbasm m25p16_spi_uart_bridge.psm --m4".  I also tried to run it with "opbasm m25p16_spi_uart_bridge.psm --m4 -t ROM_form_S6_2K5Aug11.vhd" but got the same error.

Thanks.

[Sergiy]

Here is command-line to compile PicoBlaze6 assembly that I use:

python ../opbasm/opbasm.py -6 -s 256 -m 1024 --m4 -d -r -x -t ROM_form.vhd m25p16_spi_uart_bridge.psm

пʼятниця, 2 червня 2017 р. 09:14:26 UTC+3 користувач RACHIT AJITSARIA написав:

[RACHIT AJITSARIA]

Hi Sergiy. Thanks for the help. Got results after a few modifications. Now I am able to program the flash but unable to load the Java source files (p_064000, p_066000). When I try programming with these two files, the Impact crashes (no error message). Without them, I have been able to program the flash with the rest 5 files + 1 bit file. Also, I was unable to automatically load the configuration from flash, so did it through ETH_routines by jumping to eth_init_defaults. This enabled me to open the webpage. But I cannot use the functions as the two java source files are not present. Any clue as to what may be causing it?

Thanks.

[RACHIT AJITSARIA]

Hi Sergiy. Another thing. I tried to run the script "update_firmware.sh". But it was showing errors. "Couldn't erase sector...", "Counldn't write to sector". ANny possible clue to what can be the cause?

[Sergiy]

Hi Rachit,

Configuration from flash - is loaded if it's correctly saved at least once, otherway default config (from ETH_routines) will be loaded. It seems like Your impact - is buggy or can't produce correct .mcs file, so better use update_firmware.sh for uploading files to flash.

When board is heavily loaded, or when You trying accessing webpages and upload firmware at  the same time the "Couldn't erase sector...", "Counldn't write to sector" errors may appear. Also try to connect board directly to Your PC without WiFi or some routers/switches.

четвер, 15 червня 2017 р. 07:56:25 UTC+3 користувач RACHIT AJITSARIA написав:

[RACHIT AJITSARIA]

Hi Sergiy.

Thanks.  Another thing.  I added some UART instructions in the assembly to test the code.  I have observed that if the UART instructions are more (example  around 10), the programs starts looping from midway.  Not a big issue, but any particular reason for this?

Regards,

Rachit.

[Sergiy]

The only reason for this - is amount of instructions code, that does not fit into single 18k blockram, or if Your code placed at the position where interrupt can appear.

четвер, 22 червня 2017 р. 06:51:01 UTC+3 користувач RACHIT AJITSARIA написав:

[RACHIT AJITSARIA]

Thanks. Got it working. Since I was able to program the bit files correctly using jtag, I tried to only update web using the script and it was a scucess.

Regards,
Rachit

[RACHIT AJITSARIA]

Hi Sergiy.

I was able to program it successfully.

Still, when I try to run the script it fails frequently, although I use a wired connection. What can be the reason for this? Also, can you mention the SPI communication rate between the W5500 and the board? Or where should I look into if I want to find it.

Thanks.
Rachit

[F5SFU]

Hi Rachit,
can you let us know how you were able to go through the 'ERROR: Address exceeds memory bounds: 400 <limit 3FF>
I'm reusing the excellent work of Sergiy for a Ham radio application on another hardware, using approximately the same chips.

When I compile his original picocode with the full command line, I get this error.
I understand that we have not much extra room, as I tried to have UART debug longer messages also :=) and saw that each code line counts.

Concerning the http pages, I found a nice way to have them in my new environment (using JTAG and ImPACT) :
I load the mcs provided by Sergiy in my flash, while instructing the fpga to keep its bit file at restart, this way no risk to have pin conflict at FPGA level.
then I prepare a mcs with only my foga config (the size is much less then) and loads it, it doesn't erase the web pages.
I have then the server with default params, which allows me to save/create the configuration. And I'm set :=)

Best regards and happy new year to you all.

[Sergiy]

Dear FPGA modulator owners or developers who repeated EasyDABv2 board design,

There is an issue found on hardware design, that needs a small soldering work:

Additional resistor is needed to be placed (pull-down TXENABLE pin to ground by 2.2K resistor).

This needs to prevent board to generate noise during 1 second when plugging-in.

More info with video's why this needs to be done - is here: https://tipok.org.ua/node/56

This modification needs to be done especially if You are using output amplifier to prevent burn-out expensive transistors.

[Rene Stevens]

Sergiy, 

There is no video, or corrupted video on your website.
I see nothing.

Op maandag 4 mei 2015 12:28:13 UTC+2 schreef Sergiy:

Hi all!

After long time of development I finally have something to show.

That is DAB mode 1 modulator, which use FPGA for signal processing. It's similar to FX2->AD9957 modulator, but have Xilinx Spartan6 FPGA in-the-middle.

There is still some not very CPU-intensive pre-processing on software-side, which parses ETI and adds error-correction codes for FIC and CIF and then sends this pre-processed data to the device, which does other parts of the job.

I want to move all modilator's blocks into FPGA, but not sure if there would be enought space for it, so I decided to freeze version which I have rightnow and provide it as-is. Hope next version of the firmware will not need software pre-processing at all.

Here is explanation of the hardware-software: http://tipok.org.ua/node/44

It's also much more stable, comparing to FX2+AD9957 testing board that I described before. And most important: it does not have bug where I/Q samples been swapped sometimes. Optionally, this hardware may be used as I/Q samples player, just like USRP/HackRF. And it supports up to 6144 Ksamples per second (16-bit each).

All software/firmware source codes, schematics and pcb's are avaliable.

[Sergiy]

Hi Rene,

Thank you for feedback, I fixed video's, now it's compatible with most modern browsers.

четвер, 8 березня 2018 р. 23:16:01 UTC+2 користувач Rene Stevens написав: