Coreworld primer
ASW
or DRAFT'94 rules. For general information about corewar consult the
usenet group rec.games.corewar (at Google). The primer is a casual
introduction to the new quantum coreworld and will focus on comparing
the old instruction set(s) to the new one (referred to as ICWS'88,
DRAFT'94 and DRAFT'04 in the following). It is not a complete language
reference and should not be used as a basis for Coreworld
implementations. The file coreworld-standard.txt (distributed with
this file) should be consulted for a more formal description of the
proposed standard.
DRAFT'94
New in DRAFT'94 are instruction modifiers, additional arithmetic
instructions and a post-increment addressing mode. These will be
discussed in turn. DRAFT'94 is a true superset of ICWS'88, i.e.
warriors written in ICWS'88 should run without modification on a
MARS that implements DRAFT'94.
DRAFT'04
New in DRAFT'04 is a three dimensional virtual machine, the ".d",
".e", ".p", ".q" modifiers, the IJN, QOP and QCN instructions, a
privilege based, stochastic execution model, and the ongoing
system processes: clearing, exchanging, adding new privilege to
cores and merging cores at the end of each round. Unlike
traditional Corewar the virtual machine retains its state from
round to round. The SPL instruction and task-qeues are relegated
to a secondary role but maintained for compatibility.
INSTRUCTION MODIFIERS IN DRAFT'94
The most significant addition to ICWS'88 are instruction modifiers
that specify whether instructions operate on the A-field, B-field,
or a whole instrucution. ICWS'88 instructions operate mostly on
B-fields; exceptions to this are ADD/SUB that can add/subtract
both A- and B-fields of two target addresses and CMP which can
compare entire instructions. As a result, the A-field used to be
rather difficult, although not impossible to access. Instruction
modifiers in DRAFT'94 allow easy access to both A- and
B-fields. These are the modifiers and their meaning:
.A Instructions read and write A-fields.
.B Instructions read and write B-fields. It is easiest to think of
.A as .AA and .B as .BB.
.AB Instructions read the A-field of the A-instruction and the
B-field of the B-instruction and write to B-fields.
.BA Instructions read the B-field of the A-instruction and the
A-field of the B-instruction and write to A-fields.
.F Instructions read both A- and B-fields of the the A- and
B-instruction and write to both A- and B-fields (A to A and B to
B).
.X Instructions read both A- and B-fields of the the A- and
B-instruction and write to both A- and B-fields exchanging fields
(A to B and B to A).
.I Instructions read and write entire instructions.
A- and B-instructions are the instructions pointed to by the A-
and B-field, respectively. In immediate addressing mode,
A/B-instructions are the current instruction. For
backwards-compatibilty with ICWS'88, there is a mapping of
modifier-less instructions to instructions with modifiers that
takes the A and B-modes into account. E.g.
MOV 0,1 translates into MOV.I 0,1
ADD 0,1 translates into ADD.F 0,1
MOV #0,1 translates into MOV.AB #0,1
In DRAFT'94 there are no illegal instructions, that is every
opcode goes with every modifier and every addressing mode
combination. Non-sensical combinations of opcode/modifier are
treated like the closest combination that makes sense, i.e.
ADD.I behaves like ADD.F
Special cases are branch instructions (JMP,JMZ,JNZ,DJN). DRAFT'94
still only allows to branch to the A- instruction. If you read the
draft, you will find that it cleverly distinguishes between
A-numbers and A-pointers. Branch instructions have A-pointers
that are not subject to modifiers. This restriction was imposed
to disallow all- too-powerful bombs like JMP.F 0,0 and SPL.F 0,0.
INSTRUCTION MODIFIERS IN DRAFT'04
.D can be used in combination with any other modifier. It means
the B-pointer refers to the dual core.
.E can be used in combination with any other modifier. It means
the probability of execution is 3/4 and not 1/4 for all other
modifiers. One unit of privilege is consumed on execution only.
.P instructions read and write Privilege fields
.Q instructions measure then read and write Qubit fields
MUL,DIV,MOD in DRAFT'94
These three new arithmetic opcodes supplement ADD and SUB from
ICWS'88. A division by zero in DIV and MOD is treated like DAT.
If two divisions occur as in DIV.F, both divisions are attempted
and core is updated for the division that succeeded. If either
division tried to divide by zero, the process is killed.
IJN in DRAFT'04
The IJN, Increment Jump if Not zero, instruction is added for
symmetry with DJN.
QOP, QCN in DRAFT'04
These instructions operate on Qubit fields. QCN, quantum control
not, the a-pointer specifies the control qubit and the b-pointer
specifies the target qubit. The QOP operation does one (or two
for .F) single qubit operations on the a-pointer. The b-number
specifies which operation is used.
POST-INCREMENT INDIRECT in DRAFT'94
The post-increment indirect addressing mode, symbolized by ">",
was added for symmetry. It contrasts with "<", pre-decrement
indirect, where the field used for indirect addressing is
incremented before the effective address calculation takes place.
OTHERS
The ORG (ORiGin) pseudo-instruction is an alternative to END for
specifying the execution start. The argument of ORG points to the
start instruction relative to the first instruction of the
warrior; ORG 0 points to the first instruction.
EXAMPLES
A mixture of imps in DRAFT'04 and DRAFT'94 becomes:
- - -
$
;redcode
;name myImp
;assert 1
;standard 2004
start MOV 0, 1
end start
;redcode
;name my1994styleImp
;assert 1
start MOV 0, 1
end start
;redcode
;name myEnergyImp
;assert 1
;standard 2004
start MOV.IE 0, 1
end start
The Coreworld ecology currently permits multiple programs to be
added in a single intervention. The system "spikes" each program
into the virtual machine at random at position 0, CORESIZE/4,
CORESIZE/2 CORESIZE*3/4. A - is required at the begining of the
file for each program then followed by a $.
A replicator in DRAFT'04:
-
$
;redcode
;name myMice
;assert 1
;standard 2004
deltap equ CORESIZE/4
step equ 64
minpriv equ 64
port NOP 0, 0
first DAT 0, last-first
begin MOV #minpriv, energy
MOV #0, replicates
MOV #last-first+1, reset
loop DJN.P energy, >first
JMN loop, first
reset MOV #last-first+1, first
;count priv. as we find it
energy DJN loop, #minpriv
MOV #minpriv, energy
ADD #1, replicates
;check (and set) the dual lock
next ADD #step, last
IJN.QD next, @last
;spawns a new copy in the dual core
MOV #last-first, first
ADD #1, last
rep2 MOV.IDE @first, <last
DJN.BE rep2, first
IJN.PD 1, @last
ADD #last-first-1, last
replicates DJN next, #0
last JMP loop, 0
;boot code -- not copied
start IJN.Q 1, last;
IJN.P 1, begin
DAT 0, 0
end start
This replicator is not robust enough to survive for long and dies
out; the immediate challenge-- while the instruction set and
implementation details are still in flux-- is to find replicators
that can survive indefinitely and maintain an environment in which
privilege is relatively stable.