Digital Circuit Simulator

[Glendora Spink]

KiCadis after all a pcb design program. PCB design programs need symbols for real parts. The reason to simulate in kicad is such that you can test your design with said real parts. If he wants a simple digital simulator he should look into things like logisim which specializes on simple digital simulations.

(Which was already suggested in a different thread.)

Just to make it clear. I am in no way against using kicad for this purpose. But if people expect it to be a simple digital simulator, they try it out and find that this feature is not really present the way they expect, then people will get the idea that kicad is worthless. It is an extremly good tool for pcb design and i think the spice integration will add to that functionality. But the core function will remain the pcb design stuff.

If we add these symbols i guarantee a lot of beginners will use them and expect to make a pcb from them. My main point is: We can not add things that will compromise the core function of kicad. At least not to the official distribution.

What is the problem of using real devices in a simulation? After all the reason to simulate is to build the thing and verify it later with a measurement. What reason is there to have a powerful spice simulator and only run some digital approximation. (Which can be done as i said above in simpler tools. That are also open source.)

I suppose you would treat it like how spice gives you ideal op amps, ideal resistors, etc, Having a generic library of functional parts until the simulation library is furthur built up would help people to draft ideas,

Personally I have not had to track down device specific models before, however I am going to guess that its only there for companies that have there own simulation package, or are popular enough that someone else has already made one.

I think beginners are going to have a similar problem they do now with symbol/footprint split. They will expect atomic symbols that also have the correct simulation for the part, i.e. a BSS138 has the exact model required for the ngspice version in KiCad. They also will expect to press a button and have the complete circuit simulated without further effort!

There was a discussion on the github repo about that. The first point was that these models are most likely encrypted. And as you already said there is a user (or download) agreement. Wayne said that he is categorically against including such models in kicad. (Which is also my opinion on this.)

List of free analog and digital electronic circuit simulators, available for Windows, macOS, Linux, and comparing against UC Berkeley SPICE. The following table is split into two groups based on whether it has a graphical visual interface or not. The later requires a separate program to provide that feature, such as Qucs-S,[1] Oregano,[2] or a schematic design application that supports external simulators, such as KiCad or gEDA.

I'm developing a digital logic simulator to build my own CPU in it later (so it's a long term project). Everything works great for circuits with no loops, for example a fulladder. Then there are circuits like an SR latch, where one of the inputs of a gate is connected to the output of another gate. So I'm in a loop, because both gates need the output of the other one, to compute their own output.

What is the best way to solve this? I implemented it in a way, that (when a loop is detected) it will return it's last output. Or, when this run is the first one (so there was no previous output) I will return zero (low). So I just assume that all the outputs were low/zero in the beginning. It works so far, but I'm sure that this is not a good way to solve the issue.

In many cases, simply modeling each gate as having a unit propagation delay is a fine approach. A slightly more sophisticated alternative is to have the "simulation-step" routine for most component check whether the simulation time has advanced by a "full step", and only update its output if so; a few components could be omit that check but instead request that they be run again on the simulation step after other components have had a chance to update. That would allow some components to pretend to have zero propagation delay provided that they weren't nested too deeply (the simulation should limit how many times it will attempt to run each component's evaluate-state routine before it decides the components aren't going to reach a stable state).

Depending upon what exactly is being simulated, I would suggest having multiple output states for your components besides "high" and "low". Even adding an "indeterminate" state can be helpful, with the behavior that when a component's input changes in a way that could affect its output, the output will become "indeterminate" after the minimum propagation time, and assume a legitimate value after the maximum propagation time following the moment that the inputs become valid. Note that as signals pass through more levels of logic, the amount of time that they are "indeterminate" will increase. The only way to simulate anything meaningfully is to have a clock which is assumed stable, and ensure that clock periods are long enough that things can fully stabilize between them.

Simulating things in this way has the advantage that while simulation will "fail" (yield "indeterminate" values) on many circuits which would work in reality, the fact that such a simulation yields deterministic results would suggest that a real circuit that was built the same way would do so as well. Unfortunately, for circuits which rely upon edge-triggered latches, the most common simulation result would be "indeterminate", even for circuits which would have a 100% chance of actually working. To ease that problem, one would often want to 'jinx' a few gates so as not to stretch the 'indeterminate' interval. Doing this would be something of a "cheat", and create the possibility that a circuit might work in simulation but fail in reality. Nonetheless, if such cheats are applied carefully, they may make simulation much more useful than it would be otherwise.

CircuitLab provides online, in-browser tools for schematic capture and circuit simulation. These tools allow students, hobbyists, and professional engineers to design and analyze analog and digital systems before ever building a prototype. Online schematic capture lets hobbyists easily share and discuss their designs, while online circuit simulation allows for quick design iteration and accelerated learning about electronics.

I've built a full custom digital circuit in virtuoso, suppose to run at 3GHz. I tried to simulate it for 1ms, which takes several days... Actually I just need digital behavior of it and do not care about the transistor level things. Is there any way that I can simulate it digitally, ie, reducing the simulation time? Thanks a lot!

Thank you! Right now, I have to build the entire circuit in transistor level, it performs digital behavior, I wonder if I can do something to speedup the simulation, while it is still transistor level.

Hi Wenxu

You can also use our ultrasim fastspice simulator to do the simulation. It allows you to set different accuracy modes on your blocks. E.g. set "digital_fast" mode for the custom digital block and use default mode for the other blocks.

Best regards

Quek

Besides, I found that "aps" is also a "simulator" choise under Simulator/Directory/Host, should I change from "spectre" to "aps" when I enable APS mode in "Setup->High Performance Simulation"? Or, what's the difference between "spectre" simulator with APS mode and "aps" simulator with APS mode?

You should not use "aps" as the choice of simulator under Simulator/Directory/Host - that is obsolete and was the initial interface to the APS technology. In fact in later IC615 ISRs it has been removed. The correct interface is the Setup->High Performance Simulation.

In both modes the simulator is the same - but the interface via "aps" as the simulator is more limited because it dates from when APS had just been implemented and only supported a subset of spectre's capability.

Ultrasim has the benefit of being able to trade off accuracy versus speed for particular blocks, and if it's custom digital you probably don't need full spectre accuracy - and hence can get speed improvements that way.

I recently had the opportunity to play around with LiveWire, which is a circuit simulator and began wondering how exactly they computed the voltages across each component and the current going through each track of wire.

I have only been taught basic circuit analysis skills (such as Mesh analysis and Nodal analysis) so far, and I'm not entirely sure that they would be generic enough to implement in a 'fits-all' way within a circuit simulator.

My apologies if this does not belong here, it was a choice between here and StackOverflow and I felt that although it is a software-development oriented question, the question is more applicable to this site and it's userbase.

I've examined the code of the Falstad simulator in some detail. For circuits which consist only of linear components like resistors, switches, and voltage sources (things like logic-gate outputs are considered ground-connected voltage sources for purposes of the simulation) the simulator regards each circuit node, voltage source (connecting two nodes), or wire (likewise) as defining a linear equation and a variable, such that the number of equations and number of variables are always equal. For a circuit node, the variable is the voltage of the node, and the equation computes the total current flowing through it equal to the total current injected by any current sources. For a voltage source or wire (a wire being handled as a voltage source where the potential difference is zero), the equation sets the voltage difference between the two circuit node voltages equal to the required voltage difference, and the variable is the amount of current flowing through the voltage source from one node to the other.

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