mkMemServer{R,W,RW}

[Jamey Hicks]

I made a new version of mkMemServer to replace mkMemServerR, mkMemServerW, and mkMemServerRW. It always takes a vector of memReadClients and memWriteClients, either of which can be nil.

module mkMemServer#(Vector#(numReadClients, MemReadClient#(dataWidth)) readClients,

                    Vector#(numWriteClients, MemWriteClient#(dataWidth)) writeClients,

                    Vector#(numMMUs,MMU#(addrWidth)) mmus,

                    MemServerIndication indication)

  (MemServer#(addrWidth, dataWidth, nMasters))

We tried to do that originally but did not find the right combination of provisos to make it work, leading to the three separate modules. I would like to remove the three separate modules when they are no longer in use by anyone.

I also added mkSimpleMemServer, which instantiates an MMU, because the common case is one MMU for one MemServer.

interface SimpleMemServer#(numeric type addrWidth, numeric type dataWidth, numeric type nMasters);

   interface MemServerRequest memServerRequest;

   interface MMURequest mmuRequest;

   interface Vector#(nMasters,PhysMemMaster#(addrWidth, dataWidth)) masters;

   interface Vector#(2,Server#(ReqTup,Bit#(addrWidth))) addr;

endinterface

module mkSimpleMemServer#(Vector#(numReadClients, MemReadClient#(dataWidth)) readClients,

                          Vector#(numWriteClients, MemWriteClient#(dataWidth)) writeClients,

                          MemServerIndication indication,

                          MMUIndication mmuIndication)(SimpleMemServer#(addrWidth, dataWidth,nMasters))