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detecting L1 data cache line size

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Luke Dalessandro

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May 14, 2010, 5:13:36 PM5/14/10
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Is anyone aware of a cross-architecture way to detect the size of an
L1 data cache line size?

Linux has "getconf LEVEL1_DCACHE_LINESIZE"
Mac OS has "sysctl hw.cachelinesize"

All I've found is a reference to "prtconf -v", but my output doesn't
include anything about caches. I can use cpuid directly on x86, but I
haven't found anything sparc-ish to work yet.

Thanks in advance,
Luke

Casper H.S. Dik

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May 16, 2010, 7:49:52 AM5/16/10
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Luke Dalessandro <ldales...@gmail.com> writes:

No entries like:

name='l1-dcache-size' type=int items=1
value=00006000
name='l1-dcache-line-size' type=int items=1
value=00000040
name='l1-dcache-associativity' type=int items=1
value=00000006
name='l1-icache-size' type=int items=1
value=00008000
name='l1-icache-line-size' type=int items=1
value=00000040
name='l1-icache-associativity' type=int items=1
value=00000008
name='l2-cache-size' type=int items=1
value=00080000
name='l2-cache-line-size' type=int items=1
value=00000040
name='l2-cache-associativity' type=int items=1
value=00000008

--
Expressed in this posting are my opinions. They are in no way related
to opinions held by my employer, Sun Microsystems.
Statements on Sun products included here are not gospel and may
be fiction rather than truth.

Andrew Gabriel

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May 16, 2010, 8:25:54 AM5/16/10
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In article <4befdbe0$0$22916$e4fe...@news.xs4all.nl>,

Casper H.S. Dik <Caspe...@Sun.COM> writes:
> Luke Dalessandro <ldales...@gmail.com> writes:
>
>>Is anyone aware of a cross-architecture way to detect the size of an
>>L1 data cache line size?
>
>>Linux has "getconf LEVEL1_DCACHE_LINESIZE"
>>Mac OS has "sysctl hw.cachelinesize"
>
>>All I've found is a reference to "prtconf -v", but my output doesn't
>>include anything about caches. I can use cpuid directly on x86, but I
>>haven't found anything sparc-ish to work yet.

I believe it's generally 64 bytes as shown below, but it would
be a mistake to assume that all CPUs in the system have the same
cache-line-size -- sparc systems in particular have a long history
of allowing use of mixtures of CPUs of different specs so if it
were to change, you might find some CPUs on a system have different
cache-line-size than others, and that this might change whilst the
system is running.

> No entries like:
>
> name='l1-dcache-size' type=int items=1
> value=00006000
> name='l1-dcache-line-size' type=int items=1
> value=00000040
> name='l1-dcache-associativity' type=int items=1
> value=00000006
> name='l1-icache-size' type=int items=1
> value=00008000
> name='l1-icache-line-size' type=int items=1
> value=00000040
> name='l1-icache-associativity' type=int items=1
> value=00000008
> name='l2-cache-size' type=int items=1
> value=00080000
> name='l2-cache-line-size' type=int items=1
> value=00000040
> name='l2-cache-associativity' type=int items=1
> value=00000008

--
Andrew Gabriel
[email address is not usable -- followup in the newsgroup]

Luke Dalessandro

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May 16, 2010, 9:48:42 AM5/16/10
to
On May 16, 7:49 am, Casper H.S. Dik <Casper....@Sun.COM> wrote:

Unfortunately, no. I was hoping for that, but I just get a bunch of
this...

cpu (driver not attached)
cpu (driver not attached)
cpu (driver not attached)
cpu (driver not attached)
cpu (driver not attached)
cpu (driver not attached)
cpu (driver not attached)

Luke

Luke Dalessandro

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May 16, 2010, 9:57:02 AM5/16/10
to
On May 16, 8:25 am, and...@cucumber.demon.co.uk (Andrew Gabriel)
wrote:
> In article <4befdbe0$0$22916$e4fe5...@news.xs4all.nl>,
>         Casper H.S. Dik <Casper....@Sun.COM> writes:

>
> > Luke Dalessandro <ldalessan...@gmail.com> writes:
>
> >>Is anyone aware of a cross-architecture way to detect the size of an
> >>L1 data cache line size?
>
> >>Linux has "getconf LEVEL1_DCACHE_LINESIZE"
> >>Mac OS has "sysctl hw.cachelinesize"
>
> >>All I've found is a reference to "prtconf -v", but my output doesn't
> >>include anything about caches. I can use cpuid directly on x86, but I
> >>haven't found anything sparc-ish to work yet.
>
> I believe it's generally 64 bytes as shown below, but it would
> be a mistake to assume that all CPUs in the system have the same
> cache-line-size -- sparc systems in particular have a long history
> of allowing use of mixtures of CPUs of different specs so if it
> were to change, you might find some CPUs on a system have different
> cache-line-size than others, and that this might change whilst the
> system is running.
>

Hmm... that's awkward. I guess I can just use 128, it just seems wrong
to embed a constant into the configuration like that.

Luke

Fred

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May 17, 2010, 4:40:18 AM5/17/10
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How about prtpicl? Nowadays prtdiag is just a wrapper around that.

prtpicl -v -c cpu

Luke Dalessandro

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May 17, 2010, 8:56:44 AM5/17/10
to
On May 17, 4:40 am, Fred <f...@jeamland.org> wrote:
> How about prtpicl? Nowadays prtdiag is just a wrapper around that.
>
> prtpicl -v -c cpu

Great! Thanks Fred, that's just what I need.

Luke

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