makefile question

[John E. Davis]

Hi,

I am wondering about the portability (across unix) of the following
makefile construct:

subdir/%.o: %.c
$(CC) -c $(CFLAGS) -o subdir/$*.o $*.c

This works fine with GNU make and the SunOS 4.1 make.

Finally, is there a portable (across unix) way to collapse the following
rules

x:
make -f makefile.sun4 x
y:
make -f makefile.sun4 y

into a single one that will work for all x and y? What I have in mind is a
top level makefile and a series of architecture dependent makefiles such as
makefile.sun4, makefile.i586, etc... Then the top-level makefile would
simply do

make -f makefile.$(ARCH) x

when I type `make x'.

Thanks,
--John

[Paul D. Smith]

%% Regarding makefile question;
%% da...@space.mit.edu (John E. Davis) writes:

jed> I am wondering about the portability (across unix) of the
jed> following makefile construct:

jed> subdir/%.o: %.c
jed> $(CC) -c $(CFLAGS) -o subdir/$*.o $*.c

jed> This works fine with GNU make and the SunOS 4.1 make.

If it works in GNU make then it's by definition portable across UNIX,
since GNU make is portable across UNIX.

But the answer is no; very few makes support pattern rules like this.
Most require you to use the old-fashioned (and restrictive) suffix
rules, which cannot represent the above accurately.

jed> Finally, is there a portable (across unix) way to collapse the
jed> following rules

jed> x:
jed> make -f makefile.sun4 x
jed> y:
jed> make -f makefile.sun4 y

In GNU make you can use simply:

x y:
make -f makefile.sun4 $@

unfortunately most makes (for reason I have _never_ been able to
comprehend) don't instantiate automatic variables in explicit rules,
only in implicit rules. So the above wouldn't work. For example, I
don't think SunOS make does.

jed> into a single one that will work for all x and y? What I have
jed> in mind is a top level makefile and a series of architecture
jed> dependent makefiles such as makefile.sun4, makefile.i586,
jed> etc... Then the top-level makefile would simply do

jed> make -f makefile.$(ARCH) x

jed> when I type `make x'.

If you use GNU make the best way to handle this kind of thing is to just
use the include rule:

include makefile.$(ARCH)

This will avoid you having to re-invoke make. When you really start to
try to do this you'll find it's quite tricky to get right: for example,
what if you just want to compile foo.c? With your scheme you can't use
"make foo.o". If you just include the arch-specific file you can.
--
-------------------------------------------------------------------------------
Paul D. Smith <psm...@baynetworks.com> Network Management Development
Senior Software Engineer Bay Networks, Inc.
-----------------------------------------------==<http://www.baynetworks.com/>-
"Please remain calm...I may be mad, but I am a professional." --Mad Scientist
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These are my opinions--Bay Networks takes no responsibility for them.