dcbst vs dcbf?

[William Roberts]

dcbst vs dcbf?
I'm trying to avoid changing my code again when the 603-based systems come out,
so I followed the description in the Motorola manual for the 601 (Section 4.8
on page 4-17) which says:

"When a processor alters a memory location that may be contained in an
instruction cache, software must ensure that updates to memory are visible to
the instruction fetching mechanism. ... the following sequence is typical:

1. dcbst (update memory)
2. sync (wait for update)
3. icbi (invalidate copy in cache)
4. isync (invalidate copy in own instruction buffer)

These operations are necessary because the memory may be in write-back mode."

Somebody has just told me that the "dcbst" instruction is going to be awkward
or inefficient on the 603 chip, so I want to know whether or not I should
change to using the "dcbf" instruction instead?

Thanks,
William Roberts

PS. Does anyone know where to find the "following section that describes the
requirements for self-modifying code", mentioned in the description of "icbi"
(section 4.8.8. on page 4-21)?

-----------
Insignia Solutions Ltd, High Wycombe, UK.

[Tim Olson]

William Roberts writes:
| dcbst vs dcbf?

| Somebody has just told me that the "dcbst" instruction is going to be awkward
| or inefficient on the 603 chip, so I want to know whether or not I should
| change to using the "dcbf" instruction instead?

DCBST is no less efficient than DCBF on the 603. If you look at the
description of the two instructions, you can see that the only difference is
that DCBST leaves a cache block valid if the EA matches, while the DCBF
invalidates it.

--
-- Tim Olson
Apple Computer Inc. / Somerset