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PowerPC U-Boot
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Daniel
Feb 5, 2012, 7:33:38 AM2/5/12
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i got some problem about PowerPC memory-map. and i describe it
following, forgive my poor English please....the MPU is MPC8313
as i know, we can use eTSEC interface to connect with PHY or switch
chip by MII, and we can communicate with PHY or switch chip by SMI
bus, but i found that the PHY was mapped in local bus memory in U-
Boot, why? we can control it by SMI bus, and why do we map it, and i
can not find any connection between PHY and local bus interface.
and the code in U-Boot is:
#define CFG_VSC7385_BASE 0xF0000000
#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */
#define CFG_BR2_PRELIM 0xf0000801 /* VSC7385 Base address */
#define CFG_OR2_PRELIM 0xfffe09ff /* VSC7385, 128K bytes*/
#define CFG_LBLAWBAR2_PRELIM CFG_VSC7385_BASE/* Access window base at
VSC7385 base */
#define CFG_LBLAWAR2_PRELIM 0x80000010 /* Access window size 128K */
following, forgive my poor English please....the MPU is MPC8313
as i know, we can use eTSEC interface to connect with PHY or switch
chip by MII, and we can communicate with PHY or switch chip by SMI
bus, but i found that the PHY was mapped in local bus memory in U-
Boot, why? we can control it by SMI bus, and why do we map it, and i
can not find any connection between PHY and local bus interface.
and the code in U-Boot is:
#define CFG_VSC7385_BASE 0xF0000000
#define CONFIG_VSC7385_ENET /* VSC7385 ethernet support */
#define CFG_BR2_PRELIM 0xf0000801 /* VSC7385 Base address */
#define CFG_OR2_PRELIM 0xfffe09ff /* VSC7385, 128K bytes*/
#define CFG_LBLAWBAR2_PRELIM CFG_VSC7385_BASE/* Access window base at
VSC7385 base */
#define CFG_LBLAWAR2_PRELIM 0x80000010 /* Access window size 128K */
Scott Wood
Feb 9, 2012, 9:02:09 AM2/9/12
to
a normal PHY. As drivers/net/vsc7385.c points out, "Further details on the
register information can be obtained from Vitesse" -- with an NDA.
-Scott
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