Good free and open source Z80 emulation code?
Linards Ticmanis
do you maybe know if there is low level Z80 CPU emulation code available
(maybe as part of some existing emulator) that
1.) supports undocumented instructions and flags and
2.) is licensed under GPL or some compatible license?
(The code in MAME/MESS is unfortunately not GPL).
Thanks for any help,
--
Linards Ticmanis
Edward
Kendall) source code is GPL; you could use that.
-Edward
--
"Sanity" is the last refuge of the unimaginative.
visit my useless website -- http://dev-null.chu.cam.ac.uk
Philip Kendall
>
> do you maybe know if there is low level Z80 CPU emulation code available
> (maybe as part of some existing emulator) that
>
> 1.) supports undocumented instructions and flags and
> 2.) is licensed under GPL or some compatible license?
http://fuse-emulator.svn.sourceforge.net/viewvc/fuse-emulator/trunk/fuse/z80/
Disclaimer: I wrote it.
It doesn't support MEMPTR (bits 3 and 5 of the flags register after BIT
n, (HL)), but other than that you'll be pushed to find a difference
between it and a real Z80. If you do, let me know :-)
Cheers,
Phil
Darrell Stec
You left out such an important feature? How could you? :-)
--
Later,
Darrell
Philip Kendall
> Philip Kendall wrote:
>
>> http://fuse-emulator.svn.sourceforge.net/viewvc/fuse-
> emulator/trunk/fuse/z80/
>>
>> It doesn't support MEMPTR (bits 3 and 5 of the flags register after BIT
>> n, (HL)), but other than that you'll be pushed to find a difference
>> between it and a real Z80. If you do, let me know :-)
>
[ I know the above comment was in jest ]
No software (other than programs written deliberately to test MEMPTR)
make any use of the feature, so adding it would be a) tedious, b) of
little benefit and c) slow down the emulation, which is an issue on some
mobile platforms.
If anybody else wants to add it (probably as a compile-time option), I'm
more than happy to accept a patch :-)
Cheers,
Phil
jgharston
Martijn Dekker
Linards Ticmanis <ticm...@gmx.de> wrote:
> Hello to all the Amstrad/Schneider, MSX and Sinclair people!
>
> do you maybe know if there is low level Z80 CPU emulation code available
> (maybe as part of some existing emulator) that
>
> 1.) supports undocumented instructions and flags and
> 2.) is licensed under GPL or some compatible license?
Have you tried YAZE-AG? It is GPL and claims to emulate undocumented
opcodes. (It also comes with a CP/M clone operating system.)
http://www.mathematik.uni-ulm.de/users/ag/yaze/
- M.
Prai Jei
continuum:
> Disclaimer: I wrote it.
>
> It doesn't support MEMPTR (bits 3 and 5 of the flags register after BIT
> n, (HL)), but other than that you'll be pushed to find a difference
> between it and a real Z80. If you do, let me know :-)
How would it interpret the opcode DD CB 01 91 ? More important, how would it
emulate that instruction?
--
ξ:) Proud to be curly
Interchange the alphabetic letter groups to reply
M.O.B. i L.
> Hello to all the Amstrad/Schneider, MSX and Sinclair people!
>
> do you maybe know if there is low level Z80 CPU emulation code available
> (maybe as part of some existing emulator) that
>
> 1.) supports undocumented instructions and flags and
> 2.) is licensed under GPL or some compatible license?
>
> (The code in MAME/MESS is unfortunately not GPL).
This is LGPL and probably handles all undocumented instructions:
Filename: tilem0.975win32bin.zip
Title: TilEm 0.975
Description: TilEm is a Z80 TI emulator (73, 82, 83, 83+, 83+ SE, 84+,
84+ SE, 85, 86) with a GTK+ interface. It fully supports FlashROM,
automatic variable linking, external linking through libticables2, and
all ROM/OS versions. New in this version: libticables2 (included), fixed
buffer overflow, fixed ti-85 keypad, fixed struct definition, etc.
http://www.ticalc.org/archives/files/fileinfo/412/41292.html
Philip Kendall
>
> This is LGPL and probably handles all undocumented instructions:
> Filename: tilem0.975win32bin.zip
[ ... ]
> http://www.ticalc.org/archives/files/fileinfo/412/41292.html
Doesn't look to me like it does:
static opcode_fn opcode_fd_cb[256] = {
no_op_xx, no_op_xx, no_op_xx, no_op_xx, no_op_xx, no_op_xx,
All those opcodes have an effect.
Cheers,
Phil
--
Philip Kendall <phi...@shadowmagic.org.uk>
http://www.shadowmagic.org.uk/
M.O.B. i L.
> On 04/12/10 21:03, M.O.B. i L. wrote:
>>
>> This is LGPL and probably handles all undocumented instructions:
>> Filename: tilem0.975win32bin.zip
>
> [ ... ]
>
>> http://www.ticalc.org/archives/files/fileinfo/412/41292.html
>
> Doesn't look to me like it does:
>
> static opcode_fn opcode_fd_cb[256] = {
> no_op_xx, no_op_xx, no_op_xx, no_op_xx, no_op_xx, no_op_xx,
>
> All those opcodes have an effect.
You're probably right. I've found this page that explains what these
opcodes should do: <http://www.z80.info/decoding.htm#ddcb>.
I thought it supported all Z80 instructions because one of the
developers has made an assembler that runs on the calculator (TI-83
Plus/TI-84 Plus/Silver Edition), that supported undocumented
instructions (but perhaps not all):
<http://www.ticalc.org/archives/files/fileinfo/431/43140.html>.
Here is a quote from the manual of the assembler:
"
*Z80 instructions*
Mimas supports all of the Z80 instructions, both documented and
undocumented. For details of the documented instructions, see the
official Z80 documentation.
For convenience, when setting, resetting, or testing a system flag, you
can simply type the name of the flag (or select it from the System Flags
menu), omitting the IY offset. For instance, SET textInverse will be
automatically replaced with SET textInverse, (IY + textFlags).
The undocumented instructions are described below. Note, however, that
undocumented instructions will not work on the TI-Nspire, so you should
avoid using them in programs that are intended to be portable.
*IX/IY Half Registers*
The upper and lower halves of the IX and IY registers can be
manipulated independently, just as H and L can; these “half registers”
are referred to as IXH, IXL, IYH, and IYL. Half registers can be used in
all of the basic 8-bit operations (ADD, SUB, ADC, SBC, AND, OR, XOR, CP,
INC, DEC), can have constant values loaded into them, and can be loaded
to and from the A, B, C, D, and E registers.
*Shift Left Inverted*
SLIA is similar to the documented SLA, except that the low bit of
the result is set to 1 instead of 0. (SLIA arg has the same effect as
SCF followed by RL arg.) SLIA can be used with any of the same arguments
that can be used with SLA.
*Shift/Rotate/Set/Reset Bit with Copy*
The instructions SLA, SRA, SLIA, SRL, RL, RLC, RR, and RRC can be
used with two arguments, where the first is one of the registers B, C,
D, E, H, L, and A, and the second is an indexed address (either (IX+n)
or (IY+n).) The instructions SET and RES can be used with three
arguments, where the first is a bit number, the second is a register,
and the third is an indexed address. This means that a value is read
from that indexed address, the appropriate operation is performed on
that value, and the result is both written back to memory and also
copied into the given register. For instance, SLA H,(IX+2) has the same
effect as LD H,(IX+2) / SLA H / LD (IX+2),H. SET 3,H,(IX+2) has the same
effect as LD H,(IX+2) / SET 3,H / LD (IX+2),H.
*Test-Only Input*
IN (C) reads a byte from I/O port C, without storing it anywhere,
but sets or clears the sign, zero, and parity flags according to the
input value, just as the documented IN r,(C) instructions do. (IN (C)
has essentially the same effect as PUSH BC / IN B,(C) / POP BC.)
*Zero Output*
OUT (C),0 writes a zero byte to I/O port C. (OUT (C),0 has
essentially the same effect as PUSH BC / LD B,0 / OUT (C),B / POP BC.)
"